Topological Structure and Analysis of Interconnection Networks

Author(s):  
Junming Xu
2020 ◽  
Vol 2020 ◽  
pp. 1-7
Author(s):  
Muhammad Imran ◽  
Muhammad Azhar Iqbal ◽  
Yun Liu ◽  
Abdul Qudair Baig ◽  
Waqas Khalid ◽  
...  

In a connected graph G with a vertex v, the eccentricity εv of v is the distance between v and a vertex farthest from v in the graph G. Among eccentricity-based topological indices, the eccentric connectivity index, the total eccentricity index, and the Zagreb index are of vital importance. The eccentric connectivity index of G is defined by ξG = ∑v∈VGdvεv, where dv is the degree of the vertex v and εv is the eccentricity of v in G. The topological structure of an interconnected network can be modeled by using graph explanation as a tool. This fact has been universally accepted and used by computer scientists and engineers. More than that, practically, it has been shown that graph theory is a very powerful tool for designing and analyzing the topological structure of interconnection networks. The topological properties of the interconnection network have been computed by Hayat and Imran (2014), Haynes et al. (2002), and Imran et al. (2015). In this paper, we compute the close results for eccentricity-based topological indices such as the eccentric connectivity index, the total eccentricity index, and the first, second, and third Zagreb eccentricity index of a hypertree, sibling tree, and X-tree for k-level by using the edge partition method.


2010 ◽  
Vol 159 ◽  
pp. 285-290
Author(s):  
Hong Mei Liu ◽  
Yan Juan Zhang ◽  
Yi Han Fan

The augmented cube is one of the most versatile and efficient interconnection networks (networks for short) so far discovered for parallel computation. In this paper, the topological structure of dimensional augmented cube is analyzed. The properties related to cycle embedding in faulty have been investigated. Let denote the set of fault links. This study demonstrates that when , for each nonfault link of augmented cube networks, lies on a longest fault free cycle which contains every nodes of .


Author(s):  
A. Ferrerón Labari ◽  
D. Suárez Gracia ◽  
V. Viñals Yúfera

In the last years, embedded systems have evolved so that they offer capabilities we could only find before in high performance systems. Portable devices already have multiprocessors on-chip (such as PowerPC 476FP or ARM Cortex A9 MP), usually multi-threaded, and a powerful multi-level cache memory hierarchy on-chip. As most of these systems are battery-powered, the power consumption becomes a critical issue. Achieving high performance and low power consumption is a high complexity challenge where some proposals have been already made. Suarez et al. proposed a new cache hierarchy on-chip, the LP-NUCA (Low Power NUCA), which is able to reduce the access latency taking advantage of NUCA (Non-Uniform Cache Architectures) properties. The key points are decoupling the functionality, and utilizing three specialized networks on-chip. This structure has been proved to be efficient for data hierarchies, achieving a good performance and reducing the energy consumption. On the other hand, instruction caches have different requirements and characteristics than data caches, contradicting the low-power embedded systems requirements, especially in SMT (simultaneous multi-threading) environments. We want to study the benefits of utilizing small tiled caches for the instruction hierarchy, so we propose a new design, ID-LP-NUCAs. Thus, we need to re-evaluate completely our previous design in terms of structure design, interconnection networks (including topologies, flow control and routing), content management (with special interest in hardware/software content allocation policies), and structure sharing. In CMP environments (chip multiprocessors) with parallel workloads, coherence plays an important role, and must be taken into consideration.


2010 ◽  
Vol 37 (8) ◽  
pp. 916-922
Author(s):  
Hong WANG ◽  
Xiao-Li QU ◽  
Yan ZHAO ◽  
Jing ZHANG ◽  
Li-Na CHEN

2018 ◽  
Vol 14 (1) ◽  
pp. 4-10
Author(s):  
Fang Jing ◽  
Shao-Wu Zhang ◽  
Shihua Zhang

Background:Biological network alignment has been widely studied in the context of protein-protein interaction (PPI) networks, metabolic networks and others in bioinformatics. The topological structure of networks and genomic sequence are generally used by existing methods for achieving this task.Objective and Method:Here we briefly survey the methods generally used for this task and introduce a variant with incorporation of functional annotations based on similarity in Gene Ontology (GO). Making full use of GO information is beneficial to provide insights into precise biological network alignment.Results and Conclusion:We analyze the effect of incorporation of GO information to network alignment. Finally, we make a brief summary and discuss future directions about this topic.


2019 ◽  
Vol 33 (27) ◽  
pp. 1950331
Author(s):  
Shiguo Deng ◽  
Henggang Ren ◽  
Tongfeng Weng ◽  
Changgui Gu ◽  
Huijie Yang

Evolutionary processes of many complex networks in reality are dominated by duplication and divergence. This mechanism leads to redundant structures, i.e. some nodes share most of their neighbors and some local patterns are similar, called redundancy of network. An interesting reverse problem is to discover evolutionary information from the present topological structure. We propose a quantitative measure of redundancy of network from the perspective of principal component analysis. The redundancy of a community in the empirical human metabolic network is negatively and closely related with its evolutionary age, which is consistent with that for the communities in the modeling protein–protein network. This behavior can be used to find the evolutionary difference stored in cellular networks.


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