Digital Random Number Generator Hardware Accelerator IP-Core for Security Applications

Author(s):  
Luca Baldanzi ◽  
Luca Crocetti ◽  
Francesco Falaschi ◽  
Jacopo Belli ◽  
Luca Fanucci ◽  
...  
Electronics ◽  
2021 ◽  
Vol 10 (15) ◽  
pp. 1831
Author(s):  
Binbin Yang ◽  
Daniel Arumí ◽  
Salvador Manich ◽  
Álvaro Gómez-Pau ◽  
Rosa Rodríguez-Montañés ◽  
...  

In this paper, the modulation of the conductance levels of resistive random access memory (RRAM) devices is used for the generation of random numbers by applying a train of RESET pulses. The influence of the pulse amplitude and width on the device resistance is also analyzed. For each pulse characteristic, the number of pulses required to drive the device to a particular resistance threshold is variable, and it is exploited to extract random numbers. Based on this behavior, a random number generator (RNG) circuit is proposed. To assess the performance of the circuit, the National Institute of Standards and Technology (NIST) randomness tests are applied to evaluate the randomness of the bitstreams obtained. The experimental results show that four random bits are simultaneously obtained, passing all the applied tests without the need for post-processing. The presented method provides a new strategy to generate random numbers based on RRAMs for hardware security applications.


Sensors ◽  
2020 ◽  
Vol 20 (7) ◽  
pp. 1869 ◽  
Author(s):  
Luca Baldanzi ◽  
Luca Crocetti ◽  
Francesco Falaschi ◽  
Matteo Bertolucci ◽  
Jacopo Belli ◽  
...  

In the context of growing the adoption of advanced sensors and systems for active vehicle safety and driver assistance, an increasingly important issue is the security of the information exchanged between the different sub-systems of the vehicle. Random number generation is crucial in modern encryption and security applications as it is a critical task from the point of view of the robustness of the security chain. Random numbers are in fact used to generate the encryption keys to be used for ciphers. Consequently, any weakness in the key generation process can potentially leak information that can be used to breach even the strongest cipher. This paper presents the architecture of a high performance Random Number Generator (RNG) IP-core, in particular a Cryptographically Secure Pseudo-Random Number Generator (CSPRNG) IP-core, a digital hardware accelerator for random numbers generation which can be employed for cryptographically secure applications. The specifications used to develop the proposed project were derived from dedicated literature and standards. Subsequently, specific architecture optimizations were studied to achieve better timing performance and very high throughput values. The IP-core has been validated thanks to the official NIST Statistical Test Suite, in order to evaluate the degree of randomness of the numbers generated in output. Finally the CSPRNG IP-core has been characterized on relevant Field Programmable Gate Array (FPGA) and ASIC standard-cell technologies.


SPIN ◽  
2019 ◽  
Vol 09 (03) ◽  
pp. 1940009
Author(s):  
Akio Fukushima ◽  
Kay Yakushiji ◽  
Hitoshi Kubota ◽  
Hiroshi Imamura ◽  
Shinji Yuasa

We have developed a random-number-generator (RNG) named “spin dice,” which employs the stochastic nature of spin-torque switching (STS) in a magnetic tunnel junction. The principle of the idea is that the switching probability first tuned around 0.5 is varied linearly with the applied current. After that, the switching results are converted into binary random numbers. We fabricated several types of “spin dice” by combining magnetic tunnel junctions and single-board microcomputer, and achieved generation speed of random numbers up to several hundred kbit/sec. Because STS is scalable and magnetic tunnel junctions have compatibility to semiconductor fabrication process, “spin dice” can be considered as a promising candidate for truly random-number-generator (TRNG) for security applications.


2013 ◽  
Vol 16 (2) ◽  
pp. 210-216 ◽  
Author(s):  
Sattar B. Sadkhan ◽  
◽  
Sawsan K. Thamer ◽  
Najwan A. Hassan ◽  
◽  
...  

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