On-Chip Protection Solution for Radio Frequency Integrated Circuits in Standard CMOS Process

Author(s):  
Qiang Cui ◽  
Juin J. Liou ◽  
Jean-Jacques Hajjar ◽  
Javier Salcedo ◽  
Yuanzhong Zhou ◽  
...  
2005 ◽  
Vol 44 (4B) ◽  
pp. 2166-2170 ◽  
Author(s):  
Ming-Hsiang Cho ◽  
Kun-Ming Chen ◽  
Guo-Wei Huang ◽  
Chia-Sung Chiu

Author(s):  
Qiang Cui ◽  
Juin J. Liou ◽  
Jean-Jacques Hajjar ◽  
Javier Salcedo ◽  
Yuanzhong Zhou ◽  
...  

2013 ◽  
Vol 543 ◽  
pp. 176-179 ◽  
Author(s):  
D.Q. Zhao ◽  
Xia Zhang ◽  
P. Liu ◽  
F. Yang ◽  
C. Lin ◽  
...  

In this work we studied the fabrication of a monolithic bimaterial micro-cantilever resonant IR sensor with on-chip drive circuits. The effects of high temperature process and stress induced performance degradation were investigated. The post-CMOS MEMS (micro electro mechanical system) fabrication process of this IR sensor is the focus of this paper, starting from theoretical analysis and simulation, and then moving to experimental verification. The capacitive cantilever structure was fabricated by surface micromachining method, and drive circuits were prepared by standard CMOS process. While the stress introduced by MEMS films, such as the tensile silicon nitride which works as a contact etch stopper layer for MOSFETs and releasing stop layer for the MEMS structure, increases the electron mobility of NMOS, PMOS hole mobility decreases. Moreover, the NMOS threshold voltage (Vth) shifts, and transconductance (Gm) degrades. An additional step of selective removing silicon nitride capping layer and polysilicon layer upon IC area were inserted into the standard CMOS process to lower the stress in MOSFET channel regions. Selective removing silicon nitride and polysilicon before annealing can void 77% Vth shift and 86% Gm loss.


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