An Advanced Hardware Platform for Modern Hand-Prostheses

2018 ◽  
pp. 351-358
Author(s):  
Peter Hegen ◽  
Klaus Buchenrieder
Keyword(s):  
Hardware Platform

ТЕСТИРОВАНИЕ СЕРВЕРОВ НА ОСНОВЕ ОРИГИНАЛЬНОЙ ПЛАТФОРМЫ С УЧЕТОМ ПРИМЕНЕНИЯ В СИСТЕМАХ УПРАВЛЕНИЯ

2020 ◽  
Vol 96 (3s) ◽  
pp. 60-64
Author(s):  
И.Н. Бычков ◽  
И.А. Молчанов
Keyword(s):  
Test Cases ◽  
Hardware Platform

В данной работе рассматриваются приемы, способы и результаты тестирования серверов на основе импортозамещающей аппаратной платформы, отличной от широко распространенных, приводятся примеры найденных с помощью данных наборов тестов особенностей. The paper considers ways, methods and results of complex testing of servers based on original hardware platform that is different from and is a substitute for classic ones. Issues found by sets of these test cases have been shown.

A hierachical configuration system for a massively parallel neural hardware platform

2012 ◽  
Author(s):  
Francesco Galluppi ◽  
Sergio Davies ◽  
Alexander Rast ◽  
Thomas Sharp ◽  
Luis A. Plana ◽  
...  
Keyword(s):  
Massively Parallel ◽  
Hardware Platform ◽  
Configuration System

scholarly journals PageRank Implemented with the MPI Paradigm Running on a Many-Core Neuromorphic Platform

2021 ◽  
Vol 11 (2) ◽  
pp. 25
Author(s):  
Evelina Forno ◽  
Alessandro Salvato ◽  
Enrico Macii ◽  
Gianvito Urgese
Keyword(s):  
Parallel Execution ◽  
Spiking Neural Networks ◽  
Massively Parallel ◽  
Current Version ◽  
Hardware Platform ◽  
Pagerank Algorithm ◽  
Programming Paradigm ◽  
Neuromorphic Hardware ◽  
Efficient Communication ◽  
Many Core

SpiNNaker is a neuromorphic hardware platform, especially designed for the simulation of Spiking Neural Networks (SNNs). To this end, the platform features massively parallel computation and an efficient communication infrastructure based on the transmission of small packets. The effectiveness of SpiNNaker in the parallel execution of the PageRank (PR) algorithm has been tested by the realization of a custom SNN implementation. In this work, we propose a PageRank implementation fully realized with the MPI programming paradigm ported to the SpiNNaker platform. We compare the scalability of the proposed program with the equivalent SNN implementation, and we leverage the characteristics of the PageRank algorithm to benchmark our implementation of MPI on SpiNNaker when faced with massive communication requirements. Experimental results show that the algorithm exhibits favorable scaling for a mid-sized execution context, while highlighting that the performance of MPI-PageRank on SpiNNaker is bounded by memory size and speed limitations on the current version of the hardware.

Hardware platform for wide-area vehicular sensor networks with mobile nodes

2016 ◽  
Vol 3 ◽  
pp. 21-30 ◽  
Author(s):  
Ignacio Del Castillo ◽  
Félix Tobajas ◽  
Roberto Esper-Chaín ◽  
Valentín De Armas
Keyword(s):  
Sensor Networks ◽  
Wide Area ◽  
Mobile Nodes ◽  
Hardware Platform

The Predigest Project of Vehicle-Bone Multimedia Transmission and Control Network Based on FPGA

2012 ◽  
Vol 203 ◽  
pp. 62-66
Author(s):  
Hong Li ◽  
Qiao Zhen Hou
Keyword(s):  
Network Control ◽  
Control Network ◽  
Network System ◽  
Multimedia Transmission ◽  
Transmission Control ◽  
Hardware Platform ◽  
Arm Processor ◽  
Interface Module ◽  
Fpga Chip ◽  
And Control

The design uses 32 ARM processor S3C44B0X and Spartan™ -3E500 FPGA chip produced by Xinlinx company for setting up the hardware platform, and integrates the camera, GPS module, MiniGUI interface module. And realized bus vehicle mounted multimedia transmission control network control based on MOST. All of these are in the purpose of achieving a Predigest Project of vehicle-bone multimedia transmission and control network based on FPGA. The experiment indicated that, the transmission and control network system constructed by S3C44B0X and Spartan - 3E500 FPGA is low cast, simple and reliable.

Research and Design of the Distributed Mass Small File Storage System Based on WCF

2013 ◽  
Vol 765-767 ◽  
pp. 1087-1091
Author(s):  
Hong Lin ◽  
Shou Gang Chen ◽  
Bao Hui Wang
Keyword(s):  
Fault Tolerance ◽  
Distributed Computing ◽  
Data Storage ◽  
Large Scale ◽  
Storage System ◽  
Hardware Platform ◽  
File Storage ◽  
Computing Framework ◽  
Research And Design ◽  
Small File

Recently, with the development of Internet and the coming of new application modes, data storage has some new characters and new requirements. In this paper, a Distributed Computing Framework Mass Small File storage System (For short:Dnet FS) based on Windows Communication Foundation in .Net platform is presented, which is lightweight, good-expansibility, running in cheap hardware platform, supporting Large-scale concurrent access, and having certain fault-tolerance. The framework of this system is analyzed and the performance of this system is tested and compared. All of these prove this system meet requirements.

scholarly journals Real-time Foreground Object Detection Combining the PBAS Background Modelling Algorithm and Feedback from Scene Analysis Module

2014 ◽  
Vol 60 (1) ◽  
pp. 53-64 ◽  
Author(s):  
Tomasz Kryjak ◽  
Mateusz Komorkiewicz ◽  
Marek Gorgon
Keyword(s):  
Object Detection ◽  
Detection Algorithm ◽  
Scene Analysis ◽  
Foreground Object ◽  
Connected Component ◽  
Hardware Platform ◽  
Static Object ◽  
Consecutive Frame ◽  
Sobel Edge Detection ◽  
Edge Similarity

Abstract The article presents a hardware implementation of the foreground object detection algorithm PBAS (Pixel-Based Adaptive Segmenter) with a scene analysis module. A mechanism for static object detection is proposed, which is based on consecutive frame differencing. The method allows to distinguish stopped foreground objects (e.g. a car at the intersection, abandoned luggage) from false detections (so-called ghosts) using edge similarity. The improved algorithm was compared with the original version on popular test sequences from the changedetection.net dataset. The obtained results indicate that the proposed approach allows to improve the performance of the method for sequences with the stopped objects. The algorithm has been implemented and successfully verified on a hardware platform with Virtex 7 FPGA device. The PBAS segmentation, consecutive frame differencing, Sobel edge detection and advanced one-pass connected component analysis modules were designed. The system is capable of processing 50 frames with a resolution of 720 × 576 pixels per second

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