A Parallel Architecture for Stateful, High-Speed Intrusion Detection

With the advent of the computer network era, people like to think in deeper ways and methods. In addition, the power information network is facing the problem of information leakage. The research of power information network intrusion detection is helpful to prevent the intrusion and attack of bad factors, ensure the safety of information, and protect state secrets and personal privacy. In this paper, through the NRIDS model and network data analysis method, based on deep learning and cloud computing, the demand analysis of the real-time intrusion detection system for the power information network is carried out. The advantages and disadvantages of this kind of message capture mechanism are compared, and then a high-speed article capture mechanism is designed based on the DPDK research. Since cloud computing and power information networks are the most commonly used tools and ways for us to obtain information in our daily lives, our lives will be difficult to carry out without cloud computing and power information networks, so we must do a good job to ensure the security of network information network intrusion detection and defense measures.

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PEM-PCA: A Parallel Expectation-Maximization PCA Face Recognition Architecture

The Scientific World JOURNAL ◽

10.1155/2014/468176 ◽

2014 ◽

Vol 2014 ◽

pp. 1-16 ◽

Cited By ~ 11

Author(s):

Kanokmon Rujirakul ◽

Chakchai So-In ◽

Banchar Arnonkijpanich

Keyword(s):

Feature Extraction ◽

Face Recognition ◽

Expectation Maximization ◽

High Speed ◽

Expectation Maximization Algorithm ◽

Parallel Architecture ◽

Principal Component ◽

Eigenvalue Decomposition ◽

Computational Time ◽

Recognition Systems

Principal component analysis or PCA has been traditionally used as one of the feature extraction techniques in face recognition systems yielding high accuracy when requiring a small number of features. However, the covariance matrix and eigenvalue decomposition stages cause high computational complexity, especially for a large database. Thus, this research presents an alternative approach utilizing an Expectation-Maximization algorithm to reduce the determinant matrix manipulation resulting in the reduction of the stages’ complexity. To improve the computational time, a novel parallel architecture was employed to utilize the benefits of parallelization of matrix computation during feature extraction and classification stages including parallel preprocessing, and their combinations, so-called a Parallel Expectation-Maximization PCA architecture. Comparing to a traditional PCA and its derivatives, the results indicate lower complexity with an insignificant difference in recognition precision leading to high speed face recognition systems, that is, the speed-up over nine and three times over PCA and Parallel PCA.

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Efficient Memristor-Based Architecture for Intrusion Detection and High-Speed Packet Classification

ACM Journal on Emerging Technologies in Computing Systems ◽

10.1145/3264819 ◽

2018 ◽

Vol 14 (4) ◽

pp. 1-27 ◽

Cited By ~ 2

Author(s):

Venkataramesh Bontupalli ◽

Chris Yakopcic ◽

Raqibul Hasan ◽

Tarek M. Taha

Keyword(s):

Intrusion Detection ◽

High Speed ◽

Packet Classification

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The Ultra High Speed LMS Algorithm Implemented on Parallel Architecture Suitable for Multidimensional Adaptive Filtering

Adaptive Filtering ◽

10.5772/25070 ◽

2011 ◽

Author(s):

Marwan Jaber

Keyword(s):

Adaptive Filtering ◽

High Speed ◽

Parallel Architecture ◽

Lms Algorithm ◽

Ultra High Speed

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Efficient Intrusion Detection for High-Speed Networks

Applied Mechanics and Materials ◽

10.4028/www.scientific.net/amm.263-266.2915 ◽

2012 ◽

Vol 263-266 ◽

pp. 2915-2919

Author(s):

Gao Long Ma ◽

Wen Tang

Keyword(s):

Intrusion Detection ◽

Error Detection ◽

Intrusion Detection System ◽

High Speed ◽

Detection System ◽

Heavy Traffic ◽

High Speed Networks ◽

Network Intrusion ◽

Traffic Loads ◽

Rule Sets

With the great increasing of high-speed networks,the traditional network intrusion detection system(NIDS) has a serious problem with handling heavy traffic loads in real-time ,which may result in packets loss and error detection . In this paper we will introduce the efficient load balancing scheme into NIDS and improve rule sets of the detection engine so as to make NIDS more suitable to high-speed networks environment.

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