Drive Current Boosting Using Pocket Implant Near to the Strained SiGe/Si Source with Single-Metal/Dual-Metal Double-Gate Tunnel Field-Effect Transistor

Author(s):  
Prateek Jain ◽  
Deepak Kumar
Author(s):  
Ajay Kumar Singh ◽  
Tan Chun Fui

Background: Power reduction is a severe design concern for submicron logic circuits, which can be achieved by scaling the supply voltage. Modern Field Effect Transistor (FET) circuits require at least 60 mV of gate voltage for a better current drive at room temperature. The tunnel Field Effect Transistor (TFET) is a leading future device due to its steep subthreshold swing (SS), making its ideal device at a low power supply. Steep switching TFET can extend the supply voltage scaling with improved energy efficiency for digital and analog applications. These devices suffer from a sizeable ambipolar current, which cannot be reduced using Dual Metal Gate (DMG) alone. Gate dielectric materials play a crucial role in suppressing the ambipolar current. Objective: This paper presents a new structure known as triple-gate-dielectric (DM_TGD) TFET, which combines the dielectric and work function engineering to solve these problems. Method: The proposed structure uses DMG with three dielectric gate materials titanium oxide (TiO2), aluminum oxide (Al2O3), and silicon dioxide (SiO2). The high dielectric material alone as gate oxide increases the fringing fields, which results in higher gate capacitance. This structure has been simulated using 2-D ATLAS simulator in terms of drive current (Ion), ambipolar current (Iamb) and transconductance (gm). Results: The device offers better gm, lower SS, lower leakage and larger drive currents due to weaker insulating barriers at the tunneling junction. Also, higher effective dielectric constant gives better gate coupling and lower trap density. Conclusion: The proposed structure suppresses the ambipolar current and enhance the drive current with reduced SCEs.


2017 ◽  
Vol 13 (1) ◽  
pp. 76-82
Author(s):  
Ball Mukund Mani Tripathi ◽  
Prateek Jain ◽  
Shayma Prasad Das

2021 ◽  
Author(s):  
Dharmender Nishad ◽  
Kaushal Nigam ◽  
Satyendra Kumar

Abstract Temperature-induced performance variation is one of the main concerns of the conventional stack gate oxide double gate tunnel field-effect transistor (SGO-DG-TFET). In this regard, we investigate the temperature sensitivity of extended source double gate tunnel field-effect transistor (ESDG-TFET). For this, we have analyzed the effect of temperature variations on the transfer characteristics, analog/RF, linearity and distortion figure of merits (FOMs) using technology computer aided design (TCAD) simulations. Further, the temperature sensitivity performance is compared with conventional SGO-DG-TFET. The comparative analysis shows that ESDG-TFET is less sensitive to temperature variations compared to the conventional SGO-DG-TFET. Therefore, this indicates that ESDG-TFET is more reliable for low-power, high-frequency applications at a higher temperature compared to conventional SGO-DG-TFET.


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