Investigation of AlGaN Channel HEMTs on β-Ga2O3 Substrate for High-Power Electronics

The wider bandgap AlGaN (Eg > 3.4 eV) channel-based high electron mobility transistors (HEMTs) are more effective for high voltage operation. High critical electric field and high saturation velocity are the major advantages of AlGaN channel HEMTs, which push the power electronics to a greater operating regime. In this article, we present the DC characteristics of 0.8 µm gate length (LG) and 1 µm gate-drain distance (LGD) AlGaN channel-based high electron mobility transistors (HEMTs) on ultra-wide bandgap β-Ga2O3 Substrate. The β-Ga2O3 substrate is cost-effective, available in large wafer size and has low lattice mismatch (0 to 2.4%) with AlGaN alloys compared to conventional SiC and Si substrates. A physics-based numerical simulation was performed to investigate the DC characteristics of the HEMTs. The proposed HEMT exhibits sheet charge density (ns) of 1.05 × 1013 cm−2, a peak on-state drain current (IDS) of 1.35 A/mm, DC transconductance (gm) of 277 mS/mm. The ultra-wide bandgap AlGaN channel HEMT on β-Ga2O3 substrate with conventional rectangular gate structure showed 244 V off-state breakdown voltage (VBR) and field plate gate device showed 350 V. The AlGaN channel HEMTs on β-Ga2O3 substrate showed an excellent performance in ION/IOFF and VBR. The high performance of the proposed HEMTs on β-Ga2O3 substrate is suitable for future portable power converters, automotive, and avionics applications.

Thermal and Electrical Performance of AlGaAs/GaAs based HEMT device on SiC substrate

In this paper investigation on electrical and thermal performance of the AlGaAs/GaAs HEMT device is carried out by comparing the device grown on substrates like 4H-SiC and Sapphire. The investigation was carried out based on Silvaco TCAD Atlas simulation. The DC characteristics of the device with varying ambient temperature were evaluated. A deterioration of drain current from 0.9 mA to 0.5 mA is observed as temperature rises from 300K to 500K on 4H-SiC substrate. The HEMT grown on 4H-SiC substrate has a high power dissipation, resulting in reduced temperature compared to sapphire substrate. This increases the lifetime of the device by 1000s of hours and also its overall performance. The HEMT proposed here is found to have an electrically and thermally optimal performance on 4H-SiC substrate than on sapphire

Performance Analysis of Charge Plasma Induced Graded Channel Si Nanotube

This paper investigates a comparison based on DC and AC analysis of a charge plasma-based graded channel nanotube in two configurations. Nanotube structures offer enhanced gate ctontrol over other devices, they offer higher on-current than nanowires of equivalent silicon film thickness, making them a promising device, however, the core gate of nanotube results in higher gate leakages also. This paper draws a comparison of the two possible configurations of making a graded channel without ion implantation. The results show that a gate of higher work function in S-GC-NTFET is necessary to bring the same subthreshold characteristics as D-GC-NTFET. The D configuration shows slightly enhanced DC characteristics however, the RF analysis shows better results for S configuration.

Study on positive threshold voltage shift and DC characteristics of HEMTs using gate recess technique

In the present study, AlGaN/GaN high-electron-mobility transistors (HEMTs) were fabricated through metal–organic chemical vapor deposition. Gate recess etching, combined with inductively coupled plasma reactive ion etching, was adopted, and etching time was controlled to manipulate the threshold voltage [Formula: see text]. The DC characteristics of devices etched for 0–25 s were investigated. [Formula: see text] exhibited a 1.9-V positive shift in the device with the AlGaN layer etched for 25 s. The effect of an AlN buffer layer on the [Formula: see text] shift was also investigated. The [Formula: see text] of the HEMT etched for 25 s and without an AlN buffer layer exhibited a positive shift of 3.1 V.

A reliability study of Non-uniform Si TFET with dual material source: Impact of interface trap charges and temperature

The article reports the extraction of DC characteristics and small signal parameters of Non-uniform Si TFET with dual material source (NUTFET-DMS) at different frequencies followed by its reliability investigation. The reliability of the device is examined by analysing: 1) the impact of the presence of interface trap charges, 2) the impact of temperature variation (200 K- 400 K). In the analysis it has been observed that in case of absence of interface trap charges the increase in frequency reduces the value of parasitic capacitances. In addition, the presence of interface trap charges lessens the value of parasitic capacitances up to a certain gate to source voltage after that it shows a reverse effect. Further, it has been perceived that the effect of change in temperature is more on device ambipolar current when interface trap charges are present, whereas the reverse is true in the case of OFF state current and different parasitic capacitances.

Hetero - Gate Oxide Dual Metal Vertical Tunnel FET

A Silicon based Vertical Dual metal Double gate Tunnel FET (Si-VDMDGTFET) has been proposed and simulated in Sentaurus TCAD tool with improved DC and analog/RF characteristics. The vertical In-line tunneling dominates in the proposed device which results in better subthreshold slope (SS). The vertical in-line tunneling tunes the tunneling barrier and eventually controls the ON current. The dual metal gate and the heterogeneous gate stack oxide within the proposed device design gives the mouldability for controlling and improving the DC characteristics such as ON current, OFF current. The analog/RF behaviour of the proposed device has been calculated and compared with conventional lateral Silicon based dual metal double gate Tunnel FET furthermore it is seen that the proposed device outperforms the conventional lateral device.