Improved fast software implementation of block ciphers (Extended abstract)

1997 ◽  
pp. 269-273 ◽  
Author(s):  
Takeshi Shimoyama ◽  
Seiichi Amada ◽  
Shiho Moriai
Keyword(s):  
Block Ciphers ◽  
Software Implementation

scholarly journals Heuristic method for bitsliced representation of randomly generated 8×8 cryptographic S-Box

2021 ◽  
Vol 3 (2) ◽  
pp. 58-65
Author(s):  
Ya. R. Sovyn ◽  
◽  
V. V. Khoma ◽  
Keyword(s):  
High Speed ◽  
High Performance ◽  
Heuristic Method ◽  
Block Ciphers ◽  
Truth Table ◽  
Software Implementation ◽  
Logical Operations ◽  
Resistance To Power ◽  
Symmetric Block ◽  
Cache Attacks

The article is devoted to the issues of increasing the security and efficiency of software implementation for the symmetric block ciphers. For the implementation of cryptoalgorithms on low-end CPUs (8/16/32-bit microcontrollers), it is important to provide increased resistance to power consumption analysis attacks. With regard to the implementation of ciphers on high-end CPUs (x86, ARM Cortex-A), it is important to eliminate the vulnerability primarily to timing and cache attacks. The authors used a bitslice approach to securely implement block ciphers, which has potential advantages such as high speed and low computing resources. However, the known bitsliced methods have a significant limitation, since they work with deterministic S-Boxes or arbitrary S-Boxes of smaller sizes. The paper proposes a new heuristic method for bitsliced representation of cryptographic 8×8 S-Boxes containing randomly generated values. These values defy description using algebraic expressions. The method is based on the decomposition of the truth table, which describes the S-Box, into two parts. One part of the table forms logical masks, and the other is split into bit vectors. To find a logical description of these vectors an exhaustive search is used. After finding the description of all vectors, these two parts of the table are combined into one using logical operations. The use of this method oriented on software implementation in the logical basis {AND, OR, XOR, NOT} ensures the minimization of arbitrary 8×8 S-Boxes. The proposed method can be implemented using standard logical instructions on any 8/16/32/64-bit processors. It is also possible to use logical SIMD instructions from the SSE, AVX, AVX-512 extensions for x86-64 processors, which provides high performance due to the use of long registers. The corresponding software has been developed that implements the method of searching for bitsliced representations of a given S-Box, and also automatically generates C++ code for it based on SSE, AVX and AVX-512 instructions. The effectiveness of the method on the S-Box of known block ciphers, in particular the Ukrainian encryption standard "Kalyna", has been investigated. It was found that the developed algorithm requires almost half as many gates for the bitsliced description of an arbitrary S-Box than the best of known algorithm (370 gates versus 680, respectively). For ciphers that use two or four S-Box tables, joint minimization can yield up to 330 or 300 gates per table, respectively. Keywords: bitslicing; S-Box; logical minimization; SIMD; x86-64 CPU; software implementation; block ciphers.

Hash Functions Based on Block Ciphers

2009 ◽  
Vol 20 (3) ◽  
pp. 682-691
Author(s):  
Pin LIN ◽  
Wen-Ling WU ◽  
Chuan-Kun WU
Keyword(s):  
Hash Functions ◽  
Block Ciphers

A New Statistical Test on Block Ciphers

2009 ◽  
Vol 32 (4) ◽  
pp. 595-601 ◽  
Author(s):  
Hua CHEN ◽  
Deng-Guo FENG ◽  
Li-Min FAN
Keyword(s):  
Block Ciphers ◽  
Statistical Test

Algorithm for optimal allocation of limited resources based on the game iteration method

2019 ◽  
pp. 89-99
Author(s):  
V. Ya. Vilisov
Keyword(s):  
Optimal Control ◽  
Linear Programming ◽  
Embedded Systems ◽  
Iterative Method ◽  
High Speed ◽  
Optimal Allocation ◽  
Software Implementation ◽  
Limited Resources ◽  
Matrix Game ◽  
Acceptable Accuracy

The article proposes an algorithm for solving a linear programming problem (LPP) based on the use of its representation in the form of an antagonistic matrix game and the subsequent solution of the game by an iterative method. The algorithm is implemented as a computer program. The rate of convergence of the estimates of the solution to the actual value with the required accuracy has been studied. The software implementation shows a high speed of obtaining the LPP solution with acceptable accuracy in fractions or units of seconds. This allows the use algorithm in embedded systems for optimal control.

УНИФИЦИРОВАННАЯ РЕКОНФИГУРИРУЕМАЯ СХЕМА КОММУТАЦИИ БПФ

2020 ◽  
Vol 96 (3s) ◽  
pp. 114-118
Author(s):  
П.С. Поперечный ◽  
И.Ю. Поперечная
Keyword(s):  
Software Implementation ◽  
Communication Scheme ◽  
Additional Hardware

Предложен способ вычисления БПФ с унифицированной схемой коммутации от стадии к стадии. Представлено итеративное выражение для аппаратной или программной реализации схемы вычисления. Для предложенных схем описана возможность реконфигурирования для вычисления БПФ различного числа отсчетов, при этом поворотные множители остаются прежними и нет необходимости делать их переменными. The article offers a method for FFT calculation by means of unified communication scheme stage-by-stage. There is an iterating equation for hardware and software implementation. Also, it provides the reconfiguration of schemes by different samples number. The rotating multipliers are the same like in non-reconfigurable (fixed) communication scheme. So, the offered approach does not require additional hardware or software resources.

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