New Four-Quadrant CMOS Current-Mode and Voltage-Mode Multipliers

2005 ◽  
Vol 45 (3) ◽  
pp. 295-307 ◽  
Author(s):  
Mohammed A. Hashiesh ◽  
Soliman A. Mahmoud ◽  
Ahmed M. Soliman
2018 ◽  
Vol 99 (1) ◽  
pp. 47-61 ◽  
Author(s):  
Pushkar Srivastava ◽  
Ravindra K. Sharma ◽  
Rajeev K. Ranjan
Keyword(s):  

2020 ◽  
Vol 15 (3) ◽  
pp. 1-12
Author(s):  
Ana Isabela Araújo Cunha ◽  
Antonio José Sobrinho De Sousa ◽  
Edson Pinto Santana ◽  
Robson Nunes De Lima ◽  
Fabian Souza De Andrade ◽  
...  

This work presents a CMOS four quadrant analog multiplier architecture for application as the synapse element in analog cellular neural networks. For this reason, the circuit has voltage-mode inputs and a current-mode output and the chief design targets are compactness and low energy consumption. A signal application method is proposed that avoids voltage reference generators, which contributes to reduce sensitivity to supply voltage variation. Performance analysis through simulation has been accomplished for a design in CMOS 130 nm technology with 163 µm2 total active area. The circuit features ±50 mV input voltage range, 86 µW static power and ‑28.4 dB maximum total harmonic distortion. A simple technique for manual calibration is also presented.


Technologies ◽  
2019 ◽  
Vol 7 (4) ◽  
pp. 85
Author(s):  
Panagiotis Bertsias ◽  
Costas Psychalinos ◽  
Ahmed S. Elwakil ◽  
Brent Maundy

Voltage-mode and current-mode fractional-order filter topologies, which are capable of realizing various types of transfer functions, are introduced in this paper. Thanks to the employment of the transconductance parameter of the MOS transistors, the derived filter structures offer the benefit of the electronic adjustment of their frequency characteristics. With regards to the literature, the number of MOS transisitors is minimized leading to significant reduction of the circuit complexity and power dissipation. Simulation results, derived using the Design Kit of the 0.35 μm Austria Mikro Systeme CMOS process and the Cadence IC design suite, confirm the correct operation of the presented filter structures.


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