A single-stage operational amplifier with enhanced transconductance and slew rate for switched-capacitor circuits

2014 ◽  
Vol 79 (3) ◽  
pp. 589-598 ◽  
Author(s):  
Mohammad Yavari ◽  
Tohid Moosazadeh
2015 ◽  
Vol 28 (2) ◽  
pp. 223-236 ◽  
Author(s):  
Miljana Milic ◽  
Vanco Litovski

Testing switched capacitor circuits is a challenge due to the diversity of the possible faults. A special problem encountered is the synthesis of the test signal that will control and make the fault-effect observable at the test point. The oscillation based method which was adopted for testing in these proceedings resolves that important issue in its nature. Here we discuss the properties of the method and the conditions to be fulfilled in order to implement it in the right way. To achieve that, we have resolved the problem of synthesis of the positive feed-back circuit and the choice of a proper model of the operational amplifier. In that way, a realistic foundation to the testing process was generated. A second order notch cell was chosen as a case-study. Fault dictionaries were developed related to the catastrophic faults of the switches used within the cell. The results reported here are a continuation of our previous work and are complimentary to some other already published.


2020 ◽  
Vol 11 (1) ◽  
pp. 1
Author(s):  
Alessandro Catania ◽  
Mattia Cicalini ◽  
Massimo Piotto ◽  
Paolo Bruschi ◽  
Michele Dei

Slew-rate enhancement (SRE) techniques assist the charge transfer process in OTA-based switched-capacitor circuits. Parallel-type slew-rate enhancement circuits, i.e., circuits that provide a feed-forward path external to the main OTA, are attractive solutions, since they introduce a further degree of freedom in the speed/power consumption design space without affecting other specifications regarding the main OTA. This technique lends itself to be employed jointly with advanced OTA topologies in order to compose a highly energy efficient OTA/SRE system. However, insights in design choices such as power optimization are still missing for such systems. Here we discuss system level choices with the help of a simple model. Using precise electrical simulations, we demonstrate energy savings greater than 30% for different OTA/SRE systems implemented in a standard 180-nm CMOS technology.


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