Operational transconductance amplifier-based comparator for high frequency applications using 22 nm FinFET technology

<p><span>Fin field-effect transistor (FinFET) based analog circuits are gaining importance over metal oxide semiconductor field effect transistor (MOSFET) based circuits with stability and high frequency operations. Comparator that forms the sub block of most of the analog circuits is designed using operational transconductance amplifier (OTA). The OTA is designed using new design procedures and the comparator circuit is designed integrating the sub circuits with OTA. The building blocks of the comparator design such as input level shifter, differential pair with cascode stage and class AB amplifier for output swing are designed and integrated. Folded cascode circuit is used in the feedback path to maintain the common mode input value to a constant, so that the differential pair amplifies the differential signal. The gain of the comparator is achieved to be greater than 100 dB, with phase margin of 65°, common mode rejection ratio (CMRR) of above 70 dB and output swing from rail to rail. The circuit provides unity gain bandwidth of 5 GHz and is suitable for high sampling rate data converter circuits.</span></p>

Design of high speed 2-stage OTA for high capacitive load of 120pF and 2.96V

High speed operational transconductance amplifier (OTA) is used to drive high capacitive loads to reduce the charging time while providing adequate gain and stability. A 2-stage amplifier is proposed to provide high slew rate and sufficient gain and stability. 45nm process technology is used to compare performance with differential and telescopic amplifier designs. Resistive feedback and noise-gain compensation techniques are used to drive 120pF load and provide 2.96V at output for a high slew rate of 2.2V/µs.

Design of Low Voltage Low Power High Gain Operational Transconductance Amplifier

In this paper, a high gain structure of operational transconductance amplifier is presented. For low voltage operation with improved frequency response bulk driven quasi-floating gate MOSFET is used at the input. Further for achieving high gain the modified self cascode structure is used at the output. Compared to conventional self cascode the modified self cascode structure used provides higher transconductance which helps in significant boosting of gain of the amplifier. The modification is achieved by employing quasi-floating gate transistor which helps in scaling of the threshold which as a result increases the drain-to-source voltage of linear mode transistor thus changing it to saturation. This change of mode boosts the effective transconductance of self cascode MOSFET. The proposed operational transconductance amplifier when compared to its conventional showed improvement in DC gain by 30dB and also the unity gain bandwidth increases by 6 fold. The MOS models used for amplifier design are of 0.18µm CMOS technology at supply of 0.5V.

A Low-Noise High-Gain Recycling Folded Cascode Operational Transconductance Amplifier Based on Gate Driven and Quasi-Floating Bulk Technique

Operational Transconductance Amplifier (OTA) is an important circuit block used in the design of filter, amplifiers and oscillators for various analog-mixed circuit systems. However, design of a low-noise, high-gain OTA with low-power consumption is a challenging task in CMOS technology owing to high-power requirements of OTA for emulating high gain. This paper represents the design of gate-driven quasi-floating bulk recycling folded cascode (GDQFB RFC) OTA which has been shown to provide low-noise operation, emulates high gain and draws very less power. The design utilizes the gate-driven quasi-floating bulk (GDQFB) technique on a recycling folded cascode structure, which enhances the transconductance of OTA and improves its performance. All the post-layout simulation results have been obtained in 0.18-[Formula: see text]m CMOS N-well technology using BSIM3V3 device models. The obtained results indicate very high gain of 100.4 dB, gain-bandwidth of 69[Formula: see text]kHz, phase margin of 51.9∘ with power consumption of 2.31[Formula: see text][Formula: see text]W from [Formula: see text][Formula: see text]V supply voltage. The input referred noise emulated by proposed OTA is 0.684, 0.21 and 0.0592[Formula: see text][Formula: see text]V/[Formula: see text]Hz @ 1[Formula: see text]Hz, 10[Formula: see text]Hz and 1[Formula: see text]kHz, respectively. The input common mode range and output voltage swing are found to be [Formula: see text] to 0.669[Formula: see text]V and [Formula: see text] to 0.610[Formula: see text]V, respectively. Corner simulations and Monte Carlo analysis have been performed to verify the robustness of the proposed OTA. The proposed OTA can be used in design of filters and amplifiers for bio-instruments, sensor applications, neural recording applications and human implants etc.

A Low Noise High Input Impedance Chopper-Stabilized Biopotential Amplifier with Ripple Reduction Technique

Biopotential signals are created as a result of the electrochemical activity of the many cells that comprise the nervous system, and they represent both normal and pathological organ function. These signals must be identified with extreme caution because they are surrounded by a great deal of noise when detected by sensors. This article explores a novel biopotential amplifier that incorporates the chopper stabilization technique to increase noise performance and minimize offset. However, by introducing the chopper modulator into the proposed design, the amplifier's overall input impedance was lowered, which was then increased to greater than 200 MΩ by adding the forward auxiliary path to the input branch. Additionally, the output ripple, produced due to switching activity and up-sampling, was reduced by inclusion of the R-C ripple removing block at the output of the operational transconductance amplifier (OTA). The designed architecture had a mid-band gain of 40dB with a power consumption of 9 µW and an offset of 10µV and a CMRR of 82 dB. It generated a noise of 42nV/√Hz. Also, the obtained results were compared with a conventional amplifier. The proposed design was verified by carrying out simulations using 180nm technology parameters. Cadence Virtuoso (Schematic editor), Spectre (Simulator), Symica and Magic (Layout) tools were used to complete the implementation and simulation of the proposed design. HIGHLIGHTS Biopotential signals are created as a result of the electrochemical activity of the many cells which must be identified with extreme caution because they are surrounded by a great deal of noise when detected by sensors It explores a novel biopotential amplifier that incorporates the chopper stabilization technique to increase noise performance and minimize offset By introducing the chopper modulator into the proposed design, the amplifier's overall input impedance was lowered, which was then increased to greater than 200 MΩ by adding the forward auxiliary path to the input branch The output ripple, produced due to switching activity and up-sampling, was reduced by inclusion of the R-C ripple removing block at the output of the operational transconductance amplifier (OTA) The designed architecture had a mid-band gain of 40dB with a power consumption of 9 µW and an offset of 10 µV and a CMRR of 82 dB. It generated a noise of 42 nV/√Hz GRAPHICAL ABSTRACT

Implementation of Linear and Nonlinear circuits using Operational Transconductance Amplifier

This paper describes implementation of CMOS based linear and non-linear analog circuits using operational trans conductance amplifier as the basic element. These circuits have their applications in communication and signal processing areas. In this work PSPICE is used for the simulation of various analog circuits. The corresponding results are presented.