Using convolutional neural networks for character verification on integrated circuit components of printed circuit boards

2019 ◽  
Vol 49 (11) ◽  
pp. 4022-4032 ◽  
Author(s):  
Chun-Hui Lin ◽  
Shyh-Hau Wang ◽  
Cheng-Jian Lin
Electronics ◽  
2020 ◽  
Vol 9 (9) ◽  
pp. 1547
Author(s):  
Venkat Anil Adibhatla ◽  
Huan-Chuang Chih ◽  
Chi-Chang Hsu ◽  
Joseph Cheng ◽  
Maysam F. Abbod ◽  
...  

In this study, a deep learning algorithm based on the you-only-look-once (YOLO) approach is proposed for the quality inspection of printed circuit boards (PCBs). The high accuracy and efficiency of deep learning algorithms has resulted in their increased adoption in every field. Similarly, accurate detection of defects in PCBs by using deep learning algorithms, such as convolutional neural networks (CNNs), has garnered considerable attention. In the proposed method, highly skilled quality inspection engineers first use an interface to record and label defective PCBs. The data are then used to train a YOLO/CNN model to detect defects in PCBs. In this study, 11,000 images and a network of 24 convolutional layers and 2 fully connected layers were used. The proposed model achieved a defect detection accuracy of 98.79% in PCBs with a batch size of 32.


1968 ◽  
Author(s):  
Robert W. Kadis ◽  
Kenneth L. Thompson ◽  
William J. Volkman ◽  
W. Lawrence Hill ◽  
Charlotte E. Gillette

Author(s):  
Tohru Suwa ◽  
Hamid A. Hadim

A multidisciplinary placement optimization methodology for heat generating electronic components on printed circuit boards (PCBs) is presented. The methodology includes thermal, electrical and placement criteria involving junction temperature, wiring density, line length for high frequency signals, and critical component location which are optimized simultaneously using the genetic algorithm. A board-level thermal performance prediction methodology which is based on a combination of a superposition method and artificial neural networks (ANNs) is developed for this study. Two genetic algorithms with different thermal prediction methods are used in a cascade in the optimization process. The first genetic algorithm is based on simplified thermal network modeling and it is mainly aimed at finding component locations that avoid any overlap. Compact thermal models are used in the second genetic algorithm leading to more accurate thermal prediction which improves the placement optimization obtained using the first algorithm. Using this optimization methodology, large calculation time reduction is achieved without losing accuracy. To demonstrate the capabilities of the present methodology, a test case involving component placement on a PCB is presented.


Author(s):  
Т.С. Глотова ◽  
А.С. Иваницкий ◽  
В.В. Глотов

Электромагнитная совместимость интегральных микросхем становится все более важным аспектом в разработке высокоскоростных печатных плат. Международные стандарты были установлены для количественной и качественной оценки характеристик интегральных микросхем, а также помехоустойчивости с использованием различных методов измерения. Для решения задач, связанных с прогнозированием электромагнитных помех между интегральными микросхемами и печатными платами, необходимы модели интегральных микросхем как на внутриаппаратурном уровне, так и внутрисистемном. Такие модели могут быть получены из моделирования при наличии достаточной информации об интегральной микросхеме. Однако в большинстве практических случаев подробная информация об интегральных микросхемах может быть недоступна разработчикам радиоэлектронного оборудования. Предлагается улучшенная модель дипольного момента для анализа характеристик связи ближнего и дальнего электромагнитного поля от интегральной микросхемы, полученная на основе сканирования ближнего поля. Представлен массив электрических и магнитных дипольных моментов, используемых для воспроизведения распределений поля в плоскости сканирования над интегральной микросхемой. Полученные дипольные моменты могут использоваться в качестве источников излучений для интегральной микросхемы. Усовершенствованная модель дипольного момента особенно полезна для решения проблем радиочастотных помех, когда необходимо точно проанализировать шумовую связь в ближнем поле Electromagnetic compatibility of integrated circuits is becoming an increasingly important aspect in the design of high-speed printed circuit boards. International standards have been established to quantitatively and qualitatively assess the performance of integrated circuits as well as noise immunity using a variety of measurement methods. To solve problems associated with predicting electromagnetic interference between integrated microcircuits and printed circuit boards, models of integrated microcircuits are needed both at the in-hardware and in-system levels. Such models can be obtained from simulations if there is sufficient information about the integrated circuit. However, in most practical cases, detailed information on integrated circuits may not be available to avionics designers. An improved model of the dipole moment is proposed for analyzing the characteristics of the coupling of the near and far electromagnetic fields from an integrated circuit, obtained on the basis of scanning the near field. An array of electric and magnetic dipole moments is presented, used to reproduce the field distributions in the scanning plane above an integrated microcircuit. The obtained dipole moments can be used as sources of radiation for an integrated circuit. The advanced dipole moment model is especially useful for solving RFI problems when it is necessary to accurately analyze noise communications in the near field


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