3D resistive RAM cell design for high-density storage class memory—a review

2016 ◽  
Vol 59 (6) ◽  
Author(s):  
Boris Hudec ◽  
Chung-Wei Hsu ◽  
I-Ting Wang ◽  
Wei-Li Lai ◽  
Che-Chia Chang ◽  
...  
Keyword(s):  
High Density ◽  
Cell Design ◽  
Storage Class Memory ◽  
Resistive Ram

High-density reRAM for storage class memory

2015 ◽  
Author(s):  
Scott Sills ◽  
Alessandro Calderoni ◽  
Nirmal Ramaswamy ◽  
Shuichiro Yasuda ◽  
Katsuhisa Aratani
Keyword(s):  
High Density ◽  
Storage Class Memory

Novel Chain Stack Capacitor for 32Mb FeRAM and Beyond

2002 ◽  
Vol 748 ◽  
Author(s):  
R. Bruchhaus ◽  
T. Ozaki ◽  
U. Ellerkmann ◽  
J. Lian ◽  
Y. Kumura ◽  
...  
Keyword(s):  
Bottom Electrode ◽  
Fatigue Behavior ◽  
Ferroelectric Material ◽  
Small Cell ◽  
High Density ◽  
Cmos Process ◽  
Cell Design ◽  
Ferroelectric Capacitor ◽  
Standard Cmos Process ◽  
Sputter Deposited

ABSTRACTFor high density FeRAM devices small cell sizes are essential. The combination of the capacitor on plug (COP) structure with the Chain FeRAM™ cell design is used to develop a 32Mb FeRAM. Based on a 0.2 μm standard CMOS process a silicide capped polysilicon plug is used to contact the bottom electrode of the ferroelectric capacitor to the transistor. The barrier contact to the plug is formed by IrO2/Ir and a sputter deposited PZT (40/60) is used as ferroelectric material. The function of SrRuO3 (SRO) layers at the electrode/PZT interfaces is described in more detail. Double sided SRO results in slightly lower coercive voltage and imprint behavior compared to capacitors without SRO. Double sided SRO is essential to achieve excellent fatigue behavior measured up to 1×1011 switching cycles.

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