An efficient memory data organization strategy for application-characteristic graph processing

2021 ◽  
Vol 16 (1) ◽  
Author(s):  
Peng Fang ◽  
Fang Wang ◽  
Zhan Shi ◽  
Dan Feng ◽  
Qianxu Yi ◽  
...  
2021 ◽  
Vol 1757 (1) ◽  
pp. 012177
Author(s):  
Yingying Wang ◽  
Yuye Zhang ◽  
Shangqiang Wang ◽  
Xiaojia Ji

Author(s):  
Eter Basar ◽  
Ankur Pan Saikia ◽  
L. P. Saikia

Data Technology industry has been utilizing the customary social databases for around 40 years. Be that as it may, in the latest years, there was a generous transformation in the IT business as far as business applications. Remain solitary applications have been supplanted with electronic applications, conferred servers with different proper servers and committed stockpiling with framework stockpiling. Lower expense, adaptability, the model of pay-as-you-go are the fundamental reasons, which caused the conveyed processing are transformed into reality. This is a standout amongst the hugest upsets in Information Technology, after the development of the Internet. Cloud databases, Big Table, Sherpa, and SimpleDB are getting the opportunity to be more natural to groups. They featured the hindrances of current social databases as far as convenience, adaptability, and provisioning. Cloud databases are basically utilized for data raised applications, for example, stockpiling and mining of gigantic information or business information. These applications are adaptable and multipurpose in nature. Various esteem based data organization applications, such as managing an account, online reservation, e-exchange and stock organization, and so on are delivered. Databases with the help of these sorts of uses need to incorporate four essential highlights: Atomicity, Consistency, Isolation, and Durability (ACID), in spite of the fact that utilizing these databases isn't basic for utilizing as a part of the cloud. The objective of this paper is to discover the points of interest and disservices of databases generally utilized in cloud frameworks and to survey the difficulties in creating cloud databases


2021 ◽  
Vol 31 ◽  
Author(s):  
THOMAS VAN STRYDONCK ◽  
FRANK PIESSENS ◽  
DOMINIQUE DEVRIESE

Abstract Separation logic is a powerful program logic for the static modular verification of imperative programs. However, dynamic checking of separation logic contracts on the boundaries between verified and untrusted modules is hard because it requires one to enforce (among other things) that outcalls from a verified to an untrusted module do not access memory resources currently owned by the verified module. This paper proposes an approach to dynamic contract checking by relying on support for capabilities, a well-studied form of unforgeable memory pointers that enables fine-grained, efficient memory access control. More specifically, we rely on a form of capabilities called linear capabilities for which the hardware enforces that they cannot be copied. We formalize our approach as a fully abstract compiler from a statically verified source language to an unverified target language with support for linear capabilities. The key insight behind our compiler is that memory resources described by spatial separation logic predicates can be represented at run time by linear capabilities. The compiler is separation-logic-proof-directed: it uses the separation logic proof of the source program to determine how memory accesses in the source program should be compiled to linear capability accesses in the target program. The full abstraction property of the compiler essentially guarantees that compiled verified modules can interact with untrusted target language modules as if they were compiled from verified code as well. This article is an extended version of one that was presented at ICFP 2019 (Van Strydonck et al., 2019).


Electronics ◽  
2021 ◽  
Vol 10 (12) ◽  
pp. 1399
Author(s):  
Taepyeong Kim ◽  
Sangun Park ◽  
Yongbeom Cho

In this study, a simple and effective memory system required for the implementation of an AI chip is proposed. To implement an AI chip, the use of internal or external memory is an essential factor, because the reading and writing of data in memory occurs a lot. Those memory systems that are currently used are large in design size and complex to implement in order to handle a high speed and a wide bandwidth. Therefore, depending on the AI application, there are cases where the circuit size of the memory system is larger than that of the AI core. In this study, SDRAM, which has a lower performance than the currently used memory system but does not have a problem in operating AI, was used and all circuits were implemented digitally for simple and efficient implementation. In particular, a delay controller was designed to reduce the error due to data skew inside the memory bus to ensure stability in reading and writing data. First of all, it verified the memory system based on the You Only Look Once (YOLO) algorithm in FPGA to confirm that the memory system proposed in AI works efficiently. Based on the proven memory system, we implemented a chip using Samsung Electronics’ 65 nm process and tested it. As a result, we designed a simple and efficient memory system for AI chip implementation and verified it with hardware.


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