A Ternary Decision Diagram (TDD)-Based Synthesis Approach for Ternary Logic Circuits

2019 ◽  
Vol 100 (4) ◽  
pp. 295-307
Author(s):  
P. Mercy Nesa Rani ◽  
Abhoy Kole ◽  
Kamalika Datta
Author(s):  
Narendra Deo Singh ◽  
Rakesh Kumar Singh ◽  
Rahul Raj ◽  
Shivam Jyoti ◽  
Aloke Saha

Small ◽  
2021 ◽  
pp. 2103365
Author(s):  
Chungryeol Lee ◽  
Junhwan Choi ◽  
Hongkeun Park ◽  
Changhyeon Lee ◽  
Chang‐Hyun Kim ◽  
...  

2020 ◽  
Vol 30 (15) ◽  
pp. 2050222
Author(s):  
Li Luo ◽  
Zhekang Dong ◽  
Xiaofang Hu ◽  
Lidan Wang ◽  
Shukai Duan

The nanoscale implementations of ternary logic circuits are particularly attractive because of high information density and operation speed that can be achieved by using emerging memristor technologies. Memristor is a nanoscale device with nonvolatility and adjustable multilevel states, which creates an intriguing opportunity for the implementation of ternary logic operations. This paper proposes a novel memristor-based design for stateful ternary logic, including AND, OR, NOT, NAND, NOR, and COPY operations. In the proposed memristor ternary logic (MTL) design, the resistance of memristor is the only logic state variable for representing the input and output. By sensing the value of the input memristors, the resistance of the output memristor changes accordingly. Furthermore, the MTL gates are not only capable of performing logic operations, but also storing logic values. To illustrate the potential of the methodology, a single-input-three-output ternary decoder is designed by using the proposed ternary logic circuits. Simulation results verify the effectiveness of the presented design.


1990 ◽  
Vol 137 (1) ◽  
pp. 21 ◽  
Author(s):  
X.W. Wu ◽  
F.P. Prosser
Keyword(s):  

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