EXLOG: An expert system for logic synthesis in full-custom VLSI design

1987 ◽  
Vol 2 (2) ◽  
pp. 123
1989 ◽  
Vol 12 (4) ◽  
pp. 497-510
Author(s):  
Pei‐Yung Hsiao ◽  
Wu‐Shiung Feng ◽  
Hsiao‐Feng Chen
Keyword(s):  

Author(s):  
Yuichi Kurosawa ◽  
Seiichi Nishio ◽  
Yoshio Masubuchi ◽  
Misao Miyata

1995 ◽  
Vol 6 (2) ◽  
pp. 203-217
Author(s):  
G. Buonanno ◽  
F. Fummi ◽  
D. Sciuto
Keyword(s):  

1992 ◽  
Vol 02 (01) ◽  
pp. 1-26 ◽  
Author(s):  
LECH JÓŹWIAK

VLSI circuit design is a “trial and error” process that consists of solving a number of design problems. An optimal state assignment is one of the most important problems in the logic synthesis for sequential machines and it consists of choosing a binary representation for symbolic internal states of a sequential machine, so that the resulting logic is optimal for a given objective. This problem belongs to the class of most complex computational problems in VLSI design – it is NP hard. In a strict sense, it has never been solved, except for exhaustive search, which is impossible for large machines even with a computer. A structural heuristic approach uses specific knowledge about the structure of a given problem in order to reduce the search space to a manageable size and to maintain high quality solutions at the same time. Using the state assignment problem as an example, we determined the importance of the structural heuristic approach in CAD for VLSI and we showed how to search for suitable heuristics. We discussed a new heuristic method for state assignments concentrating on heuristic aspects such as: the solution space, the generation procedure and its operators, the evaluation functions etc. We provided some experimental results to show that the new method is very efficient. The structural heuristic search can be highly efficient. Its efficiency is limited more by the capacity of the human brain to think heuristically than by the complexity of the problem itself.


2010 ◽  
Vol 09 (03) ◽  
pp. 201-214 ◽  
Author(s):  
KUNAL DAS ◽  
DEBASHIS DE

Quantum dot cellular automaton (QCA) is an emerging technology in the field of nanotechnology. Reversible logic is emerging as a promising computing paradigm with applications in low-power quantum computing and QCA in the field of very large scale integration (VLSI) design. In this paper, we worked on conservative logic gate (CLG) and reversible logic gate (RLG). We examined that RLG and CLG are two classes of logic family intersecting each other. The intersection of RLG and CLG is parity preserving reversible (PPR) or conservative reversible logic gate (CRLG). We proposed in this paper, three algorithms to find different k × k RLG as well as CLG. Here, we demonstrate only the most promising two proposed gates of different categories. We compared the results with that of the previous Fredkin gate. The result shows that logic synthesis using above two gates will be a promising step towards the low-power QCA design era. We have shown a parity preserving approach to design all possible CLG. We also discuss a coupled Majority–minority-Voter (MmV) in a single nanostructure, dual outputs are driven simultaneously. This MmV gate is used for implementing n variables symmetric functions, testing the conservative gates as we explained that parity must be preserved if Majority and Minority output are same as input as well as output of CLG.


1996 ◽  
Vol 07 (02) ◽  
pp. 223-248 ◽  
Author(s):  
GARY YEAP ◽  
ANDREAS WILD

The paper is a survey of the current status of research and practices in various disciplines of low-power VLSI developments. After briefly discussing the rationale of the contemporary focus on low-power design, it presents the metrics and techniques used to assess the merits of the various solutions proposed for improved energy efficiency. The requirements to be fulfilled by process technologies and device structures are reviewed as well as several promising circuit design styles and ad hoc design techniques. The impact of the design automation tools is analyzed with a special emphasis on physical design and logic synthesis. A review of various architectural trade-offs, including power management, parallelism and pipelining, synchronous versus asynchronous architectures and dataflow transformations are covered, followed by a brief discussion of the impact of the system definition, software and algorithms to the overall power efficiency. Emerging semiconductor technologies and device structures are discussed and the paper is concluded with the trends and research topics for the future.


Author(s):  
DAVID RUBY ◽  
DENNIS KIBLER

One goal of Artificial Intelligence is to develop and understand computational mechanisms for solving difficult real-world problems. Unfortunately, domains traditionally used in general problem-solving research lack important characteristics of real-world domains, making it difficult to apply the techniques developed. Most classic AI domains require satisfying a set of Boolean constraints. Real-world problems require finding a solution that meets a set of Boolean constraints and performs well on a set of real-valued constraints. In addition, most classic domains are static while domains from the real world change. In this paper we demonstrate that SteppingStone, a general learning problem solver, is capable of solving problems with these characteristics. SteppingStone heuristically decomposes a problem into simpler subproblems, and then learns to deal with the interactions that arise between the subproblems. In lieu of an agreed upon metric for problem difficulty, we choose significant problems that are difficult for both people and programs as good candidates for evaluating progress. Consequently we adopt the domain of logic synthesis from VLSI design to demonstrate SteppingStone’s capabilities.


Computer ◽  
1986 ◽  
Vol 19 (7) ◽  
pp. 78-89 ◽  
Author(s):  
Subrahmanyam
Keyword(s):  

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