Low gain error, linear-in-dB variable gain amplifier with programmable gain range and gain steps

2010 ◽  
Vol 64 (12) ◽  
pp. 1203-1206 ◽  
Author(s):  
Chun-Chieh Chen ◽  
Nan-Ku Lu ◽  
Yi-Zhi Zeng
2012 ◽  
Vol 229-231 ◽  
pp. 1609-1613
Author(s):  
Xiang Ning Fan ◽  
Kuan Bao ◽  
Da Chen ◽  
Liang Yi Ma

In this paper, a programmable gain amplifier (PGA) is designed and implemented for GPS/Galileo and WCDMA dual mode receiver using TSMC 0.18μm CMOS technology. The 0-75dB variable gain range is obtained by cascading a 0-15dB variable gain stage and four 15dB fixed gain stages. An open-loop structured fully-differential amplifier with source feedback resistor is adopted in basic gain stage. Variation of gain is achieved by switch-controlled output resistor network. Gm-boost structure is used in main amplifier. A DC-offset canceller circuit using DC negative feedback technique is proposed to eliminate the DC-offset of the PGA. Post-simulation shows that the PGA has 0-75dB variable gain range, 1dB gain resolution and less than 0.3dB gain error; the minimum DC attenuation is about 15dB over the whole gain range; -3dB bandwidth at the maximum gain configuration is about 15MHz; differential output peak to peak voltage is greater than 1V; and the entire circuit consumes about 3.6mA current under 1.8V supply voltage.


2013 ◽  
Vol 76 (1) ◽  
pp. 73-80 ◽  
Author(s):  
Nan Lin ◽  
Fei Fang ◽  
Zhi-Liang Hong ◽  
Hao Fang

2009 ◽  
Vol 129 (10) ◽  
pp. 1968-1969
Author(s):  
Tetsuro Okura ◽  
Shunsuke Okura ◽  
Toru Ido ◽  
Kenji Taniguchi

Author(s):  
Jorge Pérez Bailón ◽  
Jaime Ramírez-Angulo ◽  
Belén Calvo ◽  
Nicolás Medrano

This paper presents a Variable Gain Amplifier (VGA) designed in a 0.18 μm CMOS process to operate in an impedance sensing interface. Based on a transconductance-transimpedance (TC-TI) approach with intermediate analog-controlled current steering, it exhibits a gain ranging from 5 dB to 38 dB with a constant bandwidth around 318 kHz, a power consumption of 15.5 μW at a 1.8 V supply and an active area of 0.021 mm2.


Electronics ◽  
2021 ◽  
Vol 10 (7) ◽  
pp. 804
Author(s):  
Gibeom Shin ◽  
Kyunghwan Kim ◽  
Kangseop Lee ◽  
Hyun-Hak Jeong ◽  
Ho-Jin Song

This paper presents a variable-gain amplifier (VGA) in the 68–78 GHz range. To reduce DC power consumption, the drain voltage was set to 0.5 V with competitive performance in the gain and the noise figure. High-Q shunt capacitors were employed at the gate terminal of the core transistors to move input matching points for easy matching with a compact transformer. The four stages amplifier fabricated in 40-nm bulk complementary metal oxide semiconductor (CMOS) showed a peak gain of 24.5 dB at 71.3 GHz and 3‑dB bandwidth of more than 10 GHz in 68–78 GHz range with approximately 4.8-mW power consumption per stage. Gate-bias control of the second stage in which feedback capacitances were neutralized with cross-coupled capacitors allowed us to vary the gain by around 21 dB in the operating frequency band. The noise figure was estimated to be better than 5.9 dB in the operating frequency band from the full electromagnetic (EM) simulation.


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