A Fully Differential Variable Gain Amplifier for Portable Impedance Sensing Applications

2019 ◽  
Vol 7 ◽  
Author(s):  
Jorge Pérez Bailón ◽  
Jaime Ramírez-Angulo ◽  
Belén Calvo ◽  
Nicolás Medrano
Keyword(s):  
Power Consumption ◽  
Active Area ◽  
Variable Gain Amplifier ◽  
Cmos Process ◽  
Current Steering ◽  
Impedance Sensing ◽  
Variable Gain ◽  
Fully Differential ◽  
Sensing Applications ◽  
Constant Bandwidth

This paper presents a Variable Gain Amplifier (VGA) designed in a 0.18 μm CMOS process to operate in an impedance sensing interface. Based on a transconductance-transimpedance (TC-TI) approach with intermediate analog-controlled current steering, it exhibits a gain ranging from 5 dB to 38 dB with a constant bandwidth around 318 kHz, a power consumption of 15.5 μW at a 1.8 V supply and an active area of 0.021 mm2.

scholarly journals Continuous-TimeΣΔADC with Implicit Variable Gain Amplifier for CMOS Image Sensor

2014 ◽  
Vol 2014 ◽  
pp. 1-7 ◽  
Author(s):  
Fang Tang ◽  
Amine Bermak ◽  
Amira Abbes ◽  
Mohieddine Amor Benammar
Keyword(s):  
Power Consumption ◽  
Cmos Image Sensor ◽  
Image Sensor ◽  
Variable Gain Amplifier ◽  
Cmos Process ◽  
Clock Frequency ◽  
Pixel Resolution ◽  
Loop Filter ◽  
Sigma Delta ◽  
Variable Gain

This paper presents a column-parallel continuous-time sigma delta (CTSD) ADC for mega-pixel resolution CMOS image sensor (CIS). The sigma delta modulator is implemented with a 2nd order resistor/capacitor-based loop filter. The first integrator uses a conventional operational transconductance amplifier (OTA), for the concern of a high power noise rejection. The second integrator is realized with a single-ended inverter-based amplifier, instead of a standard OTA. As a result, the power consumption is reduced, without sacrificing the noise performance. Moreover, the variable gain amplifier in the traditional column-parallel read-out circuit is merged into the front-end of the CTSD modulator. By programming the input resistance, the amplitude range of the input current can be tuned with 8 scales, which is equivalent to a traditional 2-bit preamplification function without consuming extra power and chip area. The test chip prototype is fabricated using 0.18 μm CMOS process and the measurement result shows an ADC power consumption lower than 63.5 μW under 1.4 V power supply and 50 MHz clock frequency.

scholarly journals An E-Band 21-dB Variable-Gain Amplifier with 0.5-V Supply in 40-nm CMOS

Electronics ◽  
2021 ◽  
Vol 10 (7) ◽  
pp. 804
Author(s):  
Gibeom Shin ◽  
Kyunghwan Kim ◽  
Kangseop Lee ◽  
Hyun-Hak Jeong ◽  
Ho-Jin Song
Keyword(s):  
Power Consumption ◽  
Frequency Band ◽  
Noise Figure ◽  
Complementary Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Operating Frequency ◽  
Variable Gain Amplifier ◽  
Variable Gain ◽  
Operating Frequency Band ◽  
Shunt Capacitors

This paper presents a variable-gain amplifier (VGA) in the 68–78 GHz range. To reduce DC power consumption, the drain voltage was set to 0.5 V with competitive performance in the gain and the noise figure. High-Q shunt capacitors were employed at the gate terminal of the core transistors to move input matching points for easy matching with a compact transformer. The four stages amplifier fabricated in 40-nm bulk complementary metal oxide semiconductor (CMOS) showed a peak gain of 24.5 dB at 71.3 GHz and 3‑dB bandwidth of more than 10 GHz in 68–78 GHz range with approximately 4.8-mW power consumption per stage. Gate-bias control of the second stage in which feedback capacitances were neutralized with cross-coupled capacitors allowed us to vary the gain by around 21 dB in the operating frequency band. The noise figure was estimated to be better than 5.9 dB in the operating frequency band from the full electromagnetic (EM) simulation.

scholarly journals 1.0 V-0.18 µm CMOS Tunable Low Pass Filters with 73 dB DR for On-Chip Sensing Acquisition Systems

Electronics ◽  
2021 ◽  
Vol 10 (5) ◽  
pp. 563
Author(s):  
Jorge Pérez-Bailón ◽  
Belén Calvo ◽  
Nicolás Medrano
Keyword(s):  
Power Consumption ◽  
Dynamic Range ◽  
Low Voltage ◽  
Cutoff Frequency ◽  
Cmos Technology ◽  
Active Area ◽  
Current Steering ◽  
Low Pass ◽  
On Chip ◽  
Low Pass Filters

This paper presents a new approach based on the use of a Current Steering (CS) technique for the design of fully integrated Gm–C Low Pass Filters (LPF) with sub-Hz to kHz tunable cut-off frequencies and an enhanced power-area-dynamic range trade-off. The proposed approach has been experimentally validated by two different first-order single-ended LPFs designed in a 0.18 µm CMOS technology powered by a 1.0 V single supply: a folded-OTA based LPF and a mirrored-OTA based LPF. The first one exhibits a constant power consumption of 180 nW at 100 nA bias current with an active area of 0.00135 mm2 and a tunable cutoff frequency that spans over 4 orders of magnitude (~100 mHz–152 Hz @ CL = 50 pF) preserving dynamic figures greater than 78 dB. The second one exhibits a power consumption of 1.75 µW at 500 nA with an active area of 0.0137 mm2 and a tunable cutoff frequency that spans over 5 orders of magnitude (~80 mHz–~1.2 kHz @ CL = 50 pF) preserving a dynamic range greater than 73 dB. Compared with previously reported filters, this proposal is a competitive solution while satisfying the low-voltage low-power on-chip constraints, becoming a preferable choice for general-purpose reconfigurable front-end sensor interfaces.

scholarly journals Design of a 2 GHz Linear-in-dB Variable-Gain Amplifier with 80-dB Gain Range

2014 ◽  
Vol 2014 ◽  
pp. 1-7
Author(s):  
Zhengyu Sun ◽  
Yuepeng Yan
Keyword(s):  
Current Gain ◽  
Variable Gain Amplifier ◽  
Current Steering ◽  
Gain Bandwidth ◽  
Broad Bandwidth ◽  
Variable Gain ◽  
Bicmos Technology ◽  
Sige Bicmos ◽  
Bicmos Process ◽  
Steering Current

A broadband linear-in-dB variable-gain amplifier (VGA) circuit is implemented in 0.18 μm SiGe BiCMOS process. The VGA comprises two cascaded variable-gain core, in which a hybrid current-steering current gain cell is inserted in the Cherry-Hooper amplifier to maintain a broad bandwidth while covering a wide gain range. Postlayout simulation results confirm that the proposed circuit achieves a 2 GHz 3-dB bandwidth with wide linear-in-dB gain tuning range from −19 dB up to 61 dB. The amplifier offers a competitive gain bandwidth product of 2805 GHz at the maximum gain for a 110-GHz ftBiCMOS technology. The amplifier core consumes 31 mW from a 3.3 V supply and occupies active area of 280 μm by 140 μm.

An Energy-Efficient Receiver for Human Body Communication

2012 ◽  
Vol 195-196 ◽  
pp. 84-89
Author(s):  
Da Hui Zhang ◽  
Ze Dong Nie ◽  
Feng Guan ◽  
Lei Wang
Keyword(s):  
Low Power ◽  
Human Body ◽  
Data Transmission ◽  
Energy Efficient ◽  
Low Noise ◽  
Variable Gain Amplifier ◽  
Cmos Process ◽  
Variable Gain ◽  
Active Balun ◽  
Noise Amplifier

A low-power, wideband signaling receiver for data transmission through a human body was presented in this paper. The receiver utilized a novel implementation of energy-efficient wideband impulse communication that uses the human body as the transmission medium, provides low power consumption, high reception sensitivity. The receiver consists of a low-noise amplifier, active balun, variable gain amplifier (VGA) Gm-C filter, comparator, and FSK demodulator. It was designed with 0.18um CMOS process in an active area of 1.54mm0.414mm. Post-simulation showed that the receiver has a gain range of-2dB~40dB. The receiver consumes 4mW at 1.8V supply and achieves transmission bit energy of 0.8nJ/bit.

DIGITALLY CONTROLLED CMOS BALANCED OUTPUT TRANSCONDUCTOR AND APPLICATION TO VARIABLE GAIN AMPLIFIER AND GM-C FILTER ON FIELD PROGRAMMABLE ANALOG ARRAY

2005 ◽  
Vol 14 (04) ◽  
pp. 667-684 ◽  
Author(s):  
SOLIMAN A. MAHMOUD
Keyword(s):  
Cutoff Frequency ◽  
Wide Band ◽  
Control Word ◽  
Variable Gain Amplifier ◽  
Variable Gain ◽  
Fully Differential ◽  
Programmable Analog ◽  
Digitally Controlled ◽  
Field Programmable ◽  
Field Programmable Analog Array

A digitally controlled balanced output transconductor (DCBOTA) is proposed and analyzed. The proposed DCBOTA is based on the BOTA given in Ref. 1 and MOS switches. The DCBOTA transconductance is tunable in a range of 2n-1 times using n bits control word. The proposed DCBOTA is simulated using CMOS 0.35 μm technology and the results have shown the feasibility of the proposed DCBOTA. The simulation results show that the DCBOTA has a transconductance tuning range from 20 μA/V to 140 μA/V using 3 bits control word and a 3-dB bandwidth larger than 80 MHz. A general configurable analog block (CAB) based on the proposed DCBOTA, capacitor array and MOS switches, is also presented. A collection of the CABs, fully differential buffers (FDBUFs), and their interconnection to construct a field programmable analog array (FPAA) is introduced. The DCBOTA is also used to realize a wide band digitally controlled variable gain amplifier (DCVGA) and six-order lowpass filter with variable gain and tunable cutoff frequency from 1 MHz to 7 MHz.

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