Design of SCR-based ESD protection device for power clamp using deep-submicron CMOS technology

Microelectronics Journal ◽

10.1016/j.mejo.2009.01.001 ◽

2009 ◽

Vol 40 (6) ◽

pp. 1007-1012 ◽

Author(s):

Yongseo Koo ◽

Kwangyeob Lee ◽

Kuidong Kim ◽

Jongki Kwon

Keyword(s):

Cmos Technology ◽

Deep Submicron ◽

Protection Device ◽

Esd Protection ◽

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Design of SCR-Based ESD Protection Device for Power Clamp Using Deep-Submicron CMOS Technology

IEICE Transactions on Electronics ◽

10.1587/transele.e92.c.1188 ◽

2009 ◽

Vol E92-C (9) ◽

pp. 1188-1193

Author(s):

Yongseo KOO

Keyword(s):

Cmos Technology ◽

Deep Submicron ◽

Protection Device ◽

Esd Protection ◽

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Using diode-stacked NMOS as high voltage tolerant ESD protection device for analog applications in deep submicron CMOS technologies

Solid-State Electronics ◽

10.1016/s0038-1101(02)00444-6 ◽

2003 ◽

Vol 47 (5) ◽

pp. 865-871 ◽

Author(s):

Chung-Hui Chen ◽

Yean-Kuen Fang ◽

Wen-De Wang ◽

Chien-Chun Tsai ◽

Shen Tu ◽

...

Keyword(s):

High Voltage ◽

Deep Submicron ◽

Protection Device ◽

Esd Protection ◽

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Design of dynamic-floating-gate technique for output ESD protection in deep-submicron CMOS technology

Solid-State Electronics ◽

10.1016/s0038-1101(98)00262-7 ◽

1999 ◽

Vol 43 (2) ◽

pp. 375-393 ◽

Author(s):

Hun-Hsien Chang ◽

Ming-Dou Ker ◽

Jiin-Chuan Wu

Keyword(s):

Cmos Technology ◽

Deep Submicron ◽

Floating Gate ◽

Esd Protection ◽

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Whole-chip ESD protection scheme for CMOS mixed-mode IC's in deep-submicron CMOS technology

Proceedings of CICC 97 - Custom Integrated Circuits Conference ◽

10.1109/cicc.1997.606579 ◽

2002 ◽

Author(s):

Ming-Dou Ker ◽

Chung-Yu Wu ◽

Hun-Hsien Chang ◽

Tain-Shun Wu

Keyword(s):

Cmos Technology ◽

Deep Submicron ◽

Protection Scheme ◽

Esd Protection ◽

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ESD protection in deep submicron CMOS technology - Does the transient matter?

30th European Solid-State Device Research Conference ◽

10.1109/essderc.2000.194830 ◽

2000 ◽

Author(s):

K.P. Cheung ◽

A. Kamgar

Keyword(s):

Cmos Technology ◽

Deep Submicron ◽

Esd Protection ◽

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ESD protection for deep-submicron CMOS technology using gate-couple CMOS-trigger lateral SCR structure

Proceedings of International Electron Devices Meeting ◽

10.1109/iedm.1995.499279 ◽

2002 ◽

Author(s):

Ming-Dou Ker ◽

Hun-Hsien Chang ◽

Chung-Yu Wu

Keyword(s):

Cmos Technology ◽

Deep Submicron ◽

Esd Protection ◽

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Implementation of Initial-On ESD Protection Concept With PMOS-Triggered SCR Devices in Deep-Submicron CMOS Technology

IEEE Journal of Solid-State Circuits ◽

10.1109/jssc.2007.894823 ◽

2007 ◽

Vol 42 (5) ◽

pp. 1158-1168 ◽

Author(s):

Ming-Dou Ker ◽

Shih-Hung Chen

Keyword(s):

Cmos Technology ◽

Deep Submicron ◽

Esd Protection ◽

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Equivalent circuit models for stacked spiral inductors in deep submicron CMOS technology

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03. ◽

10.1109/iscas.2003.1205682 ◽

2003 ◽

Author(s):

S.C. Rustagi ◽

Chun-Geik Tan

Keyword(s):

Equivalent Circuit ◽

Cmos Technology ◽

Deep Submicron ◽

Spiral Inductors ◽

Submicron Cmos ◽

Equivalent Circuit Models

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Lateral SCR devices with low-voltage high-current triggering characteristics for output ESD protection in submicron CMOS technology

IEEE Transactions on Electron Devices ◽

10.1109/16.662790 ◽

1998 ◽

Vol 45 (4) ◽

pp. 849-860 ◽

Author(s):

Ming-Dou Ker

Keyword(s):

Low Voltage ◽

Cmos Technology ◽

High Current ◽

Esd Protection ◽

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Study of SRAM Standby Leakage Reduction Techniques for Deep-submicron CMOS Technology

International Journal of Control and Automation ◽

10.14257/ijca.2017.10.10.05 ◽

2017 ◽

Vol 10 (10) ◽

pp. 49-62

Author(s):

Satyendra Kumar ◽

Kaushik Saha ◽

Hariom Gupta

Keyword(s):

Cmos Technology ◽

Deep Submicron ◽

Leakage Reduction ◽

Reduction Techniques ◽

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