A novel low voltage very low power CMOS class AB current output stage with ultra high output current drive capability

2012 ◽  
Vol 43 (1) ◽  
pp. 34-42 ◽  
Author(s):  
Leila Safari ◽  
Seyed Javad Azhari
2016 ◽  
Vol 20 (4) ◽  
Author(s):  
Victor Hugo Ponce Ponce ◽  
Jesús E. Molinar Solís ◽  
José Rivera Mejía ◽  
Sergio Sandoval ◽  
Miguel Rocha Pérez ◽  
...  

1999 ◽  
Vol 35 (16) ◽  
pp. 1329 ◽  
Author(s):  
G. Palumbo ◽  
S. Pennisi

2021 ◽  
Vol 11 (2) ◽  
pp. 19
Author(s):  
Francesco Centurelli ◽  
Riccardo Della Sala ◽  
Pietro Monsurrò ◽  
Giuseppe Scotti ◽  
Alessandro Trifiletti

In this paper, we present a novel operational transconductance amplifier (OTA) topology based on a dual-path body-driven input stage that exploits a body-driven current mirror-active load and targets ultra-low-power (ULP) and ultra-low-voltage (ULV) applications, such as IoT or biomedical devices. The proposed OTA exhibits only one high-impedance node, and can therefore be compensated at the output stage, thus not requiring Miller compensation. The input stage ensures rail-to-rail input common-mode range, whereas the gate-driven output stage ensures both a high open-loop gain and an enhanced slew rate. The proposed amplifier was designed in an STMicroelectronics 130 nm CMOS process with a nominal supply voltage of only 0.3 V, and it achieved very good values for both the small-signal and large-signal Figures of Merit. Extensive PVT (process, supply voltage, and temperature) and mismatch simulations are reported to prove the robustness of the proposed amplifier.


Author(s):  
Sajad Nejadhasan ◽  
Fatemeh Zaheri ◽  
Ebrahim Abiri ◽  
Mohammad Reza Salehi

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