Series resistance in solar cell is known to be one of the key factors which need to be optimized, especially through the design of the front pattern. This paper is the utilization of the improved diode and series resistance model to represent the solar cell. The results show: three buses are suitable for high square resistance and fine grid line. Plating technology can improve the absolute conversion efficiency over 17%. In addition, 71 fingers for three buses and 76 fingers for two buses were select in production. It is imagined that the proposed model is very useful for PV professionals who require simple, fast and accurate PV model to design their cells.
Abstract
Conventional series resistance imaging methods require electrical contacts for current injection or extraction in order to generate lateral current flow in the solar cell. This paper presents a new method to generate lateral current flow in the solar cell without any electrical contacts. This reduces the sample handling complexity for inline application and allows for measurements on unfinished solar cell precursors.
Photovoltaic devices based on amorphous silicon/crystalline silicon (a-Si:H/c-Si) heterojunction interfaces hold the highest efficiency as of date in the class of silicon-based devices with efficiencies exceeding 26% and are regarded as a promising technology for large-scale terrestrial PV applications. The detailed understanding behind the operation of this type of device is crucial to improving and optimizing its performance. SHJ solar cells have primarily two main interfaces that play a major role in their operation: the transparent conductive oxide (TCO)/a-Si:H interface and the a-Si:H/c-Si heterojunction interface. In the work presented here, a detailed analytical description is provided for the impact of both interfaces on the performance of such devices and especially on the device fill factor (
FF
). It has been found that the TCO work function can dramatically impact the
FF
by introducing a series resistance element in addition to limiting the forward biased current under illumination causing the well-known S-shape characteristic in the I-V curve of such devices. On the other hand, it is shown that the thermionic emission barrier at the heterojunction interface can play a major role in introducing an added series resistance factor due to the intrinsic a-Si:H buffer layer that is usually introduced to improve surface passivation. Theoretical explanation on the role of both interfaces on device operation based on 1D device simulation is experimentally verified. The I-V characteristics of fabricated devices were compared to the curves produced by simulation, and the observed degradation in the
FF
of fabricated devices was explained in light of analytical findings from simulation.
The Role of Silicon Heterojunction and TCO Barriers on the Operation of Silicon Heterojunction Solar Cells: Comparison between Theory and Experiment