g-boosted flat gain UWB low noise amplifier with active inductor-based input matching network

Integration ◽  
2016 ◽  
Vol 52 ◽  
pp. 323-333 ◽  
Author(s):  
A. Saberkari ◽  
Sh Kazemi ◽  
V. Shirmohammadli ◽  
M.C.E. Yagoub
2019 ◽  
Vol 67 (12) ◽  
pp. 4803-4811 ◽  
Author(s):  
Junyoung Jang ◽  
Hansol Kim ◽  
Geunhaeng Lee ◽  
Tae Wook Kim

2009 ◽  
Vol 57 (5) ◽  
pp. 1054-1062 ◽  
Author(s):  
M. El-Nozahi ◽  
E. Sanchez-Sinencio ◽  
K. Entesari

2000 ◽  
Vol 36 (19) ◽  
pp. 1627 ◽  
Author(s):  
B.G. Choi ◽  
Y.S. Lee ◽  
C.S. Park ◽  
K.S. Yoon

2018 ◽  
Vol 7 (2.24) ◽  
pp. 448
Author(s):  
S Manjula ◽  
M Malleshwari ◽  
M Suganthy

This paper presents a low power Low Noise Amplifier (LNA) using 0.18µm CMOS technology for ultra wide band (UWB) applications. gm boosting common gate (CG) LNA is designed to improve the noise performance.  For the reduction of on chip area, active inductor is employed at the input side of the designed LNA for input impedance matching. The proposed UWB LNA is designed using Advanced Design System (ADS) at UWB frequency of 3.1-10.6 GHz. Simulation results show that the gain of 10.74+ 0.01 dB, noise figure is 4.855 dB, input return loss <-13 dB and 12.5 mW power consumption.  


Author(s):  
Anjana Jyothi Banu ◽  
G. Kavya ◽  
D. Jahnavi

A 26[Formula: see text]GHz low-noise amplifier (LNA) designed for 5G applications using 0.18[Formula: see text][Formula: see text]m CMOS technology is proposed in this paper. The circuit includes a common-source in the first stage to suppress the noise in the amplifier. The successive stage has a Cascode topology along with an inductive feedback to improve the power gain. The input matching network is designed to achieve the input reflection coefficient less than [Formula: see text]7dB at the intended frequency. The matching network at the output is designed using inductor–capacitor (LC) components connected in parallel to attain the output reflection coefficient of [Formula: see text]10[Formula: see text]dB. Due to the inductor added in feedback at the second stage. The [Formula: see text] obtained is 18.208[Formula: see text]dB at 26[Formula: see text]GHz with a noise figure (NF) of 2.8[Formula: see text]dB. The power supply given to the LNA is 1.8[Formula: see text]V. The simulation and layout of the presented circuit are performed using Cadence Virtuoso software.


2020 ◽  
Vol 29 (11) ◽  
pp. 2020006
Author(s):  
Tian Qi ◽  
Songbai He ◽  
Cheng Zhong ◽  
Zhitao Zhu

In this paper, the design of a wideband monolithic microwave integrated circuit (MMIC) low-noise amplifier (LNA) fabricated in 0.13-[Formula: see text]m GaAs pHEMT process is presented. A simple T-type input matching network (IMN) and a source feedback structure are employed to achieve low noise figure (NF). The MMIC LNA, which operates across 12–18[Formula: see text]GHz, can be used for satellite applications. Experimental results show an NF around 1.5[Formula: see text]dB in 12–17.5[Formula: see text]GHz and a minimum NF of 1.21[Formula: see text]dB at 16.5[Formula: see text]GHz. In addition, a flat small-signal gain of [Formula: see text][Formula: see text]dB is achieved at 13.5–17.5[Formula: see text]GHz. The input return loss is lower than [Formula: see text] dB at 12–14.5[Formula: see text]GHz and the output return loss is lower than [Formula: see text] dB at 12–17[Formula: see text]GHz. The power consumed is lower than 0.3[Formula: see text]W and the [Formula: see text] (1-dB compression point) output power is around 13[Formula: see text]dBm.


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