Pattern-assisted stacking colloidal quantum dots for photonic integrated circuits

Nanoscale ◽  
2019 ◽  
Vol 11 (29) ◽  
pp. 13885-13893 ◽  
Author(s):  
Kexiu Rong ◽  
Hui Liu ◽  
Kebin Shi ◽  
Jianjun Chen

The simple pattern-assisted stacking approach using the same material is proposed to construct on-chip photonic components for integrated circuits.

2021 ◽  
Author(s):  
Alexander Eich ◽  
Tobias C. Spiekermann ◽  
Lisa Sommer ◽  
Helge Gehring ◽  
Julian B. Rasmus ◽  
...  

2018 ◽  
Vol 24 (1) ◽  
pp. 1-20 ◽  
Author(s):  
Fred Kish ◽  
Vikrant Lal ◽  
Peter Evans ◽  
Scott W. Corzine ◽  
Mehrdad Ziari ◽  
...  

CLEO: 2014 ◽  
2014 ◽  
Author(s):  
Suzanne Bisschop ◽  
Yunpeng Zhu ◽  
Weiqiang Xie ◽  
Antoine Guille ◽  
Zeger Hens ◽  
...  

2008 ◽  
Vol 2008 ◽  
pp. 1-7 ◽  
Author(s):  
Richard Soref

A brief overview of silicon photonics is given here in order to provide a context for invited and contributed papers in this special issue. Recent progress on silicon-based photonic components, photonic integrated circuits, and optoelectronic integrated circuits is surveyed. Present and potential applications are identified along with the scientific and engineering challenges that must be met in order to actualize applications. Some on-going government-sponsored projects in silicon optoelectronics are also described.


2017 ◽  
Vol 27 (4) ◽  
pp. 327 ◽  
Author(s):  
Dung Cao Truong ◽  
Dao Anh Vu ◽  
Chung Vu Hoang

In this paper, we introduce a new two-mode (de)multiplexer based on the silicon-on-insulator (SOI) platform. The device is built on a symmetric Y-junction, a 2×2 multimode interference (MMI) waveguide and a phaseshifter in the form of a ridge waveguide which is designed using 3D scalar beam propagation method (BPM). The phase evolution in the structure is discussed in details. Simulation results show that the device can operate in a wide wavelength range (150 nm) with a low insertion loss and small crosstalk. Large fabrication tolerance to the width of the input waveguide up to 100 nm is achieved, which is compatible to the current CMOS manufacturing technologies for the photonic integrated circuits. Furthermore, the small footprint (4µm×286µm) makes the device suitable for applications in high bitrate and compact on-chip silicon photonic integrated circuits.


2008 ◽  
Author(s):  
Amy V. Thompson ◽  
Hubert Seigneur ◽  
Michael N. Leuenberger ◽  
Winston V. Schoenfeld

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