Simple carrier‐based pulse‐width modulation scheme for three‐phase four‐wire neutral‐point‐clamped inverters with neutral‐point balancing

2016 ◽  
Vol 9 (2) ◽  
pp. 365-376 ◽  
Author(s):  
Fei Luo ◽  
Ka‐Hong Loo ◽  
Yuk‐Ming Lai
Keyword(s):  
Pulse Width ◽  
Pulse Width Modulation ◽  
Neutral Point ◽  
Modulation Scheme ◽  
Three Phase

Appropriate Switching State Selection to Avoid Sapacitor Imbalance in Five-Level NPC

2018 ◽  
Vol 9 (1) ◽  
pp. 276
Author(s):  
Kuthuri Narasimha Raju ◽  
Chandra Sekhar Obbu ◽  
Ramamoorthy M
Keyword(s):  
Pulse Width ◽  
Pulse Width Modulation ◽  
Reference Signal ◽  
Neutral Point ◽  
Modulation Scheme ◽  
Zero Crossings ◽  
Load Demand ◽  
Capacitor Voltage ◽  
State Selection ◽  
Switching State

<p>An intrinsic problem with neutral point clamped (NPC) multilevel inverters (MLI) is unbalance of capacitor voltage. There are many mitigation techniques well established in the literature to balance the neutral point voltage for 3-level inverter. These techniques employ either Carrier based pulse width modulation (CBPWM), Space vector pulse width modulation (SVPWM) or hybrid of both the PWM techniques. Balancing becomes complicated as the level of the inverter increases due to addition of capacitor junctions. The imbalance in capacitor voltages may cause uneven voltage distribution among switching devices and sometimes may cause failure. It also increases harmonic content in its output waveform. This paper develops new modulation scheme for balancing capacitor voltages for Five-level inverter .The scheme is a hybrid PWM which is a combination of both CBPWM and SVPWM techniques. As per this scheme CBPWM is applied to meet the load demand and at the zero crossings of the reference signal, CBPWM is blocked and for one carrier cycle. During this SVPWM is applied with   appropriate switching state selection to neutralize the imbalance in capacitor voltage.</p>

scholarly journals Three-Phase Symmetric Cascading Z-Source Seven Levels Multilevel Inverter Excited by Multi Carrier Sinusoidal Pulse Width Modulation Scheme

2019 ◽  
Vol 8 (10) ◽  
pp. 4269-4274
Keyword(s):  
Pulse Width ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Multilevel Inverter ◽  
Modulation Scheme ◽  
Performance Parameters ◽  
Output Waveform ◽  
Three Phase ◽  
Sinusoidal Pulse Width Modulation ◽  
Z Sources

The Multilevel Z sources Inverter have been documented as attractive topologies used for elevated voltage adaptation. As the digit of levels improved, the synthesized set of steps output waveform have many ladder, imminent the preferred sine waveform but the major weakness of MLI be its amplitude of ac output voltage is imperfect to DC input sources voltage summing up. To conquer this drawback seven level cascading symmetric multilevel inverter based Z source inverter have been projected. This work focuses on different multi-carrier sinusoidal PWM scheme for the seven level three phase Z source symmetric cascading inverter. Performance parameters of seven level three phase Z source symmetric cascading inverter has been analyzed. A simulation circuit model of seven level three phase Z source symmetric cascading inverter urbanized using MATLAB/SIMULINK and its presentation have been urbanized.

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