At present, digital signal processing involves enormous amounts of computations with large-bit arrays, which are carried out in real time. In connection with the need to solve more and more complex problems, constantly growing requirements are imposed on the main parameters of digital processors (speed, reliability, power consumption, etc.), which determine the computing capabilities of systems with digital signal processing. In turn, the rapid development of microelectronics, its successes make it possible to create more and more high-performance computing systems, which makes it possible to solve more and more complex problems, including in the military sphere. The production of the latest information technology means is a technological task that can be solved exclusively by economically developed countries. Bringing domestic microelectronics to the current world level requires significant investments. Therefore, the study and research of discrete nodes and devices is of the direct practical importance. When developing promising computers, new technological approaches should be applied: minimizing power consumption, maintaining modularity and high computational density within a single node, creating high-speed data transmission with the lowest delays, creating an efficient storage system, and choosing the best types of memory. One of such possible approaches is the use of a non-positional form of information presentation in computing systems for national and military purposes. This gives a number of advantages, the main ones of which are: a decrease (by orders of magnitude) in the hardware volume of computing devices, an increase in the speed of calculations, an increase in the noise immunity of communication channels. To use the above method, it is proposed to include a probabilistic arithmetic device in the information processing device that performs basic arithmetic operations (addition, multiplication, exponentiation, subtraction, division), which are performed without the use of additional algorithms and mechanisms, in contrast to “classical" digital representation of binary information, where all operations are performed on the basis of the addition operation.
Empirical investigation: performance and power‐consumption based dual‐level model for exascale computing systems
