A high linearity current mode multiplier/divider with a wide dynamic range

2012 ◽  
Vol 33 (12) ◽  
pp. 125003
Author(s):  
Pengfei Liao ◽  
Ping Luo ◽  
Bo Zhang ◽  
Zhaoji Li
Keyword(s):  
Dynamic Range ◽  
Current Mode ◽  
Wide Dynamic Range ◽  
High Linearity

Single transistor high linearity and wide dynamic range active inductor

2013 ◽  
Vol 43 (3) ◽  
pp. 277-285 ◽  
Author(s):  
G. Leuzzi ◽  
V. Stornelli ◽  
L. Pantoli ◽  
S. Del Re
Keyword(s):  
Dynamic Range ◽  
Active Inductor ◽  
Wide Dynamic Range ◽  
High Linearity

scholarly journals InGaAs/InAlAs SAGCMCT avalanche photodiode with high linearity and wide dynamic range

2022 ◽  
Vol 20 (2) ◽  
pp. 022503
Author(s):  
Yu Li ◽  
Weifang Yuan ◽  
Ke Li ◽  
Xiaofeng Duan ◽  
Kai Liu ◽  
...  
Keyword(s):  
Dynamic Range ◽  
Avalanche Photodiode ◽  
Wide Dynamic Range ◽  
High Linearity

scholarly journals Design of MOS-translinear Multiplier/Dividers in Analog VLSI

VLSI Design ◽  
2000 ◽  
Vol 11 (4) ◽  
pp. 321-329 ◽  
Author(s):  
Antonio J. Lopez-Martin ◽  
Alfonso Carlosena
Keyword(s):  
Dynamic Range ◽  
Geometric Mean ◽  
Current Mode ◽  
Building Blocks ◽  
Analog Vlsi ◽  
Cmos Process ◽  
Analog Multiplier ◽  
Wide Dynamic Range ◽  
Wide Range ◽  
Cascade Connection

A general framework for designing current-mode CMOS analog multiplier/divider circuits based on the cascade connection of a geometric-mean circuit and a squarer/divider is presented. It is shown how both building blocks can be readily obtained from a generic second-order MOS translinear loop. Various implementations are proposed, featuring simplicity, favorable precision and wide dynamic range. They can be successfully employed in a wide range of analog VLSI processing tasks. Experimental results of two versions, based on stacked and folded MOS-translinear loops and fabricated in a 2.4-μm CMOS process, are provided in order to verify the correctness of the proposed approach.

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