DC pulse hot-carrier-stress effects on gate-induced drain leakage current in n-channel MOSFETs

2001 ◽  
Vol 48 (12) ◽  
pp. 2746-2753 ◽  
Author(s):  
Ja-Hao Chen ◽  
Shyh-Chyi Wong ◽  
Yeong-Her Wang
Keyword(s):  
Leakage Current ◽  
Hot Carrier ◽  
Stress Effects ◽  
Hot Carrier Stress

Hot Carrier Stress Effects of SiO2 Passivated AlGaN/GaN High Electron Mobility Transistors

2019 ◽  
Vol 3 (5) ◽  
pp. 213-220 ◽  
Author(s):  
Min-Woo Ha ◽  
Young-Hwan Choi ◽  
Joon-Hyun Park ◽  
Kwang-Seok Seo ◽  
Min-Koo Han
Keyword(s):  
Electron Mobility ◽  
High Electron Mobility Transistors ◽  
High Electron ◽  
High Electron Mobility ◽  
Hot Carrier ◽  
Stress Effects ◽  
Electron Mobility Transistors ◽  
Hot Carrier Stress

Hot-Carrier Stress Effects on GIDL and SILC in 90nm LDD-MOSFET with Ultra-Thin Gate Oxide

2009 ◽  
Vol 26 (1) ◽  
pp. 017304 ◽  
Author(s):  
Hu Shi-Gang ◽  
Hao Yue ◽  
Ma Xiao-Hua ◽  
Cao Yan-Rong ◽  
Chen Chi ◽  
...  
Keyword(s):  
Gate Oxide ◽  
Hot Carrier ◽  
Stress Effects ◽  
Hot Carrier Stress ◽  
Thin Gate Oxide

Gate Overlapped Lightly Doped Drain Poly-Si TFTs Employing 45° Tilt Implant For Source and Drain

2004 ◽  
Vol 808 ◽  
Author(s):  
Jae-Hoon Lee ◽  
Moon-Young Shin ◽  
Heesun Shin ◽  
Woo-Jin Nam ◽  
Min-Koo Han
Keyword(s):  
Leakage Current ◽  
Short Channel ◽  
Hot Carrier ◽  
Ion Doping ◽  
Channel Gate ◽  
Hot Carrier Stress ◽  
Lightly Doped Drain

ABSTRACTWe propose a short channel gate overlapped lightly doped drain (GOLDD) poly-Si TFT employing 45° tilt implant for source and drain (S/D) regions without any additional ion doping or mask. Oblique-incident ELA activation is performed to activate both n+ S/D and n- LDD regions as well as cure junction defects. The proposed poly-Si TFT can suppress the anomalous leakage current, and exhibit the better reliability against the hot-carrier stress.

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