A fully integrated low-power CMOS particle detector front-end for space applications

1998 ◽  
Vol 45 (4) ◽  
pp. 2272-2278 ◽  
Author(s):  
J. Vandenbussche ◽  
F. Leyn ◽  
G. Van der Plas ◽  
G. Gielen ◽  
W. Sansen
Author(s):  
Peter Vancorenland ◽  
Philippe Coppejans ◽  
Wouter De Cock ◽  
Paul Leroux ◽  
Michiel Steyaert

VLSI Design ◽  
2007 ◽  
Vol 2007 ◽  
pp. 1-13 ◽  
Author(s):  
Jianhong Xiao ◽  
Guang Zhang ◽  
Tianwei Li ◽  
Jose Silva-Martinez

A low-cost low-power DTV tuner for current digital television application is described. In order to increase integration level and reduce power consumption for off-air DTV tuner application, an SAW-filterless tuner front-end architecture is adopted. As a part of the concept, key building blocks for this architecture are implemented on a main stream 0.35 μm CMOS technology. Experimental measurements for the prototype chip validate the system architecture; the prototype consumes 300 mw and achieves 45 dB of image rejection ratio within the entire 750 MHz frequency band.


2013 ◽  
Vol 02 (04) ◽  
pp. 104-111 ◽  
Author(s):  
Donald Y. C. Lie ◽  
Vighnesh Das ◽  
Weibo Hu ◽  
Yenting Liu ◽  
Tam Nguyen

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