Analysis of Non-Idealities on CMOS Passive Mixers

In the current state of the art, WiFi-alike standards require achieving a high Image Rejection Ratio (IRR) while having low power consumption. Thus, quadrature structures based on passive ring mixers offer an attractive and widely used solution, as they can achieve a high IRR while being a passive block. However, it is not easy for the designer to know when a simple quadrature scheme is enough and when they should aim for a double quadrature structure approach, as the latter can improve the performance at the cost of requiring more area and complexity. This study focuses on the IRR, which crucially depends on the symmetry between the I and Q branches. Non-idealities (component mismatches, parasitics, etc.) will degrade the ideal balance by affecting the mixer and/or following/previous stages. This paper analyses the effect of imbalances, providing the constraints for obtaining a 40 dB IRR in the case of a conversion from a one-hundred-megahertz signal to the five-gigahertz range (upconversion) and vice versa (downconversion) for simple and double quadrature schemes. All simulations were carried out with complete device models from 65 nm standard CMOS technology and also a post-layout Monte Carlo analysis was included for mismatch analysis. The final section includes guidelines to help designers choose the most adequate scheme for each case.

Design and Analysis of a Reconfigurable Gilbert Mixer for Software-Defined Radios

A reconfigurable gm-boosted, image-rejected downconversion mixer is presented in this paper using the SiGe 8 HP technology. The proposed mixer operates within 0.9–13.5 GHz that is suitable for software-defined radio applications. The conversion mixer comprises of resistive biased radio frequency (RF) section, double balanced Gilbert cell mixer core sections divided as per I and Q stages for image-rejection purpose, inductively peaked gm-boosting section and tunable filter section, respectively. In comparison to previous works in the scientific literature, the design shows enhanced conversion gain (CG), noise figure (NF), and image-rejection ratio (IRR). For the entire band of operation, the mixer attains a good return loss |S11| of <−10 dB. Additionally, the design accomplishes an excellent CG of 22 dB, NF of 2.5 dB, and an image-rejection ratio of 30.2 dB at maximum frequency. Finally, a third-order intercept point (IP3) of −3.28 dBm and 1 dB compression point (CP1) of −13 dBm, respectively, shows moderate linearity performance.

A 24-GHz RF Transmitter in 65-nm CMOS for In-Cabin Radar Applications

A 24-GHz direct-conversion transmitter is proposed for in-cabin radar applications. The proposed RF transmitter consists of an I/Q up-conversion mixer, an I/Q local (LO) oscillator generator, and a power amplifier. To improve the linearity of the I/Q up-conversion mixer, an inverter transconductor with third-order intermodulation (IM3) distortion cancellation is proposed. To improve the I/Q balancing performance of the I/Q LO generator, a poly-phase filter, including parasitic line inductance, is proposed. By employing a highly linear I/Q up-conversion mixer and a balanced I/Q LO generator, the 24-GHz direct-conversion transmitter achieves high linearity and I/Q balancing characteristics. It is fabricated in a 65-nm CMOS process and consumes 150 mW. It shows an OP1dB of 8.6 dBm, an LO leakage of −48 dBc, and an image rejection ratio of −49 dBc for the entire operating band from 24 GHz to 24.5 GHz.

Pass-Band Gain Improvement Technique for Passive RC Polyphase Filter in Bluetooth Low-IF Receiver Using Two RC Band-Stop Filters

This paper proposes a method to design a flat pass-band gain with two RC band-stop filters for a 4-stage passive RC polyphase filter in a Bluetooth receiver. Based on the superposition principle, the transfer function of the poplyphase filter is derived. However, the pass-band gain of this filter is not flat on the positive frequency domain. There are two local maximum values when the input signals are the wanted signals. Therefore, two RC band-stop filters are used to improve the pass-band gain of these local maximum values. As a result, a flat pass-band gain passive RC poly-phase filter is designed for a Bluetooth low-IF receiver which image rejection ratio is-36dB, and ripple gain is 0.47dB.

I/Q Linear Phase Imbalance Estimation Technique of the Wideband Zero-IF Receiver

The in-phase/quadrature (I/Q) imbalance encountered in the zero-IF receiver leads to incomplete image frequency suppression, which severely deteriorates image rejection ratio (IRR) of the receiver system and must be improved using additional analog or digital signal processing. The I/Q linear phase imbalance (LPI) is the key of the I/Q imbalance, which consists of the time delay deviation (TDD) and the local oscillator (LO) phase offset. TDD is negligible in most literature, but it degrades system performance largely for wideband communication systems. This paper proposes a method based on the cross-power spectrum between the I/Q signal to address the estimation problem of LPI. Compared with other conventional methods, the proposed approach calculates LPI parameters simultaneously without any additional hardware. The MATLAB simulation is utilized to evaluate the effectiveness of the presented method. Moreover, the experimental platform of detailed design demonstrates the feasibility of the proposed estimation method, and IRR of the system before and after compensation shows that LPI has been accurately estimated and eliminated with the help of an appropriate compensation structure. Both reveal that the proposed method offers an effective solution to the LPI problem.

A Highly-Integrated, Switchless and Baluns-Embedded Transceiver with a Differential Structure for C-Band Radar Application

This paper presents a highly-integrated transceiver with a differential structure for C-band (5–6[Formula: see text]GHz) radar application using a switchless and baluns-embedded configuration. To reduce the noise figure (NF) in receiver (Rx) mode and enhance the output power in transmitter (Tx) mode, the balun at RF port is embedded into the low-noise amplifier (LNA) and the power amplifier (PA), respectively. Besides, the RF switch is removed by designing the matching networks that both LNA and PA can share. The same topology is also adopted at the IF port. To achieve a high image rejection ratio (IRR), a Hartley architecture using polyphase filters (PPFs) is adopted. The proposed transceiver has been implemented in 1P6M 0.18-[Formula: see text]m CMOS process. The receiver achieves 6.9-dB NF, [Formula: see text]7.5-dBm IIP3 and 26.3-dB gain with three-step digital gain controllability. Also the measured IRR is better than 41[Formula: see text]dBc. The transmitter achieves 9.6-dBm output power and 19.2-dB gain. The chip consumes 106[Formula: see text]mA in the Rx mode and 141[Formula: see text]mA in the Tx mode from the 3.3-V power supply.

DESIGN OF FREQUENCY INDEPENDENT DIGITAL IQ IMBALANCE COMPENSATOR FOR RECEIVERS

Derivation of IQ imbalance in IQ receivers because of non-idealities of analog front-end has a significant negative effect on received signal quality and serious RF system performance degradation. Thereat the RF designers have an objective to create and improve compact and stand-alone methods of IQ imbalance compensation which provide best possible Image Rejection Ratio (IRR). The DSP-based methods of compensation are the most perspective. In this paper described one of version of autonomous and adaptive frequency independent IQ imbalance compensation algorithm which can be implemented as an IP that which can be used in different SoC for RF applications. The calculation method is based on digital signal statistic estimation with real-time convergence of compensation coefficients to the goal values which provide best image rejection. The results of algorithm’s processing for different input values with different IQ imbalance values are presented with max and min image rejection ratio estimation.