Common-mode voltage reduction method modifying the distribution of zero-voltage vector in PWM converter/inverter system

2001 ◽  
Vol 37 (6) ◽  
pp. 1732-1738 ◽  
Author(s):  
Hyeoun-Dong Lee ◽  
Seung-Ki Sul
Keyword(s):  
Reduction Method ◽  
Common Mode ◽  
Pwm Converter ◽  
Common Mode Voltage ◽  
Voltage Vector ◽  
Zero Voltage

scholarly journals Opposite Triangle Carrier with SVPWM for Common-Mode Voltage Reduction in Dual Three Phase Motor Drives

Energies ◽  
2021 ◽  
Vol 14 (2) ◽  
pp. 282
Author(s):  
Seon-Ik Hwang ◽  
Jang-Mok Kim
Keyword(s):  
Electromagnetic Interference ◽  
Pulse Width Modulation ◽  
Motor Drives ◽  
Common Mode ◽  
Pwm Inverter ◽  
Common Mode Voltage ◽  
Voltage Vector ◽  
Three Phase ◽  
The Common ◽  
Zero Voltage

The common-mode voltage (CMV) generated by the switching operation of the pulse width modulation (PWM) inverter leads to bearing failure and electromagnetic interference (EMI) noises. To reduce the CMV, it is necessary to reduce the magnitude of dv/dt and change the frequency of the CMV. In this paper, the range of the CMV is reduced by using opposite triangle carrier for ABC and XYZ winding group, and the change in frequency in the CMV is reduced by equalizing the dwell time of the zero voltage vector on ABC and XYZ winding group of dual three phase motor.

scholarly journals Optimized Modulation Method for Common-Mode Voltage Reduction in H7 Inverter

Energies ◽  
2021 ◽  
Vol 14 (19) ◽  
pp. 6409
Author(s):  
Belete Belayneh Negesse ◽  
Chang-Hwan Park ◽  
Seung-Hwan Lee ◽  
Seon-Woong Hwang ◽  
Jang-Mok Kim
Keyword(s):  
Dwell Time ◽  
Pulse Width Modulation ◽  
Modulation Method ◽  
Limited Area ◽  
Common Mode ◽  
Common Mode Voltage ◽  
Offset Voltage ◽  
Voltage Vector ◽  
Three Phase ◽  
Zero Voltage

The three-phase H7 inverter topology installs an additional power semiconductor switch to the positive or negative node of the DC-link for reducing the common-mode voltage (CMV) by disconnecting the inverter from the DC source during the zero-voltage vectors. The conventional CMV reduction method for the three-phase H7 inverter uses modified discontinuous pulse width modulation (MDPWM) and generates a switching signal for the additional switch using logical operations. However, the conventional method is unable to eliminate the CMV for the entire dwell time of the zero-voltage vectors. It only has the effect of reducing the CMV in a limited area of the space vector where the V7 zero voltage vector is applied. Therefore, this paper proposes an optimized modulation method that can reduce the CMV during the entire dwell time of zero-voltage vectors. The proposed method moves the switching patterns by adding an offset voltage to guarantee that only one kind of zero-voltage vector, V7, is applied in the system. It then turns off the seventh switch only during the zero-voltage vector to disconnect the inverter from the DC source. As a result, the CMV and the leakage current are attenuated for the entire dwell time of the zero-voltage vector. Simulation and experimental results confirm the validity of the proposed method.

scholarly journals Optimization of TSPWM for Common-Mode Voltage Reduction in Vehicular Electric Drive System

2021 ◽  
Vol 13 (1) ◽  
pp. 5
Author(s):  
Shang Jiang ◽  
Yuan Wang
Keyword(s):  
Electric Drive ◽  
Drive System ◽  
Modulation Method ◽  
Time Interval ◽  
Common Mode ◽  
Common Mode Voltage ◽  
Electric Drive System ◽  
The Common ◽  
Modulation Methods ◽  
Zero Voltage

Common-mode voltage can be reduced effectively by optimized modulation methods without increasing additional costs. However, the existing methods cannot satisfy the requirements of the vehicular electric-drive application. This paper optimizes the tri-state voltage modulation method to reduce the common-mode voltage for vehicular electric drive system applications. Firstly, the discontinuous switching issue during sector transition is analyzed. Under the limit of two switching times in one period, multiple alignments combination is proposed to address that issue. Secondly, the zero-voltage time intervals in different modulation ranges are explored. This paper proposes an unsymmetric translation method to reconstruct the voltage vector, and then the minimum zero-voltage time interval is controlled to enough value for safe switching. Finally, the proposed methods have been validated through experiments on a vehicular electric drive system. The results show that the common-mode voltage can be reduced effectively in the whole range with the optimized tri-state voltage modulation method.

Common-Mode Voltage Reduction of Three-Level Four-Leg PWM Converter

2015 ◽  
Vol 51 (5) ◽  
pp. 4006-4016 ◽  
Author(s):  
Seung-Jun Chee ◽  
Sanggi Ko ◽  
Hyeon-Sik Kim ◽  
Seung-Ki Sul
Keyword(s):  
Common Mode ◽  
Pwm Converter ◽  
Common Mode Voltage

scholarly journals Space-vector modulation for three-phase indirect matrix converters to reduce common-mode voltage

2021 ◽  
Vol 4 (2) ◽  
pp. first
Author(s):  
Hoan Quoc Tran ◽  
Tien Manh Vu ◽  
Tuyen Dinh Nguyen
Keyword(s):  
Matrix Converter ◽  
Space Vector Modulation ◽  
Space Vector ◽  
Common Mode ◽  
Common Mode Voltage ◽  
Output Performance ◽  
Three Phase ◽  
The Common ◽  
Vector Modulation ◽  
Zero Voltage

This paper presents a space vector modulation strategy for a three-phase indirect matrix converter to reduce the common-mode voltage and maintain the output performance. To reduce the peak value of the common-mode voltage to 57.7% of the input phase voltage, three active voltage vectors are used to generate the desired output voltage with arbitrary amplitude and frequency, instead of using both active and zero voltage vectors as in the traditional space vector modulation strategy. Although the common-mode voltage is reduced, the output waveform quality of the three-phase indirect matrix converter deteriorates due to the absence of the zero voltage vectors. To overcome this problem, the proposed space vector modulation strategy is redesigned to control the rectifier stage of the indirect matrix converter by utilizing three active current vectors instead of two as usual. Consequently, the constant average dc-link voltage is achieved, which can improve the output performance in terms of the output voltage and current harmonic distortion. The simulation is implemented by PSIM software and experimental results are provided to verify the effectiveness of the proposed space vector modulation strategy.

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