A Carrier-Based Discontinuous PWM Strategy of NPC Three-Level Inverter for Common-Mode Voltage and Switching Loss Reduction

For the conventional carrier-based pulse width modulation (CBPWM) strategies of neutral point clamped (NPC) three-level inverters, the higher common-mode voltage (CMV) is a major drawback. However, with CMV suppression strategies, the switching loss is relatively high. In order to solve the above issue, a carrier-based discontinuous PWM (DPWM) strategy for NPC three-level inverter is proposed in this paper. Firstly, the reference voltage is modified by the twice injection of zero-sequence voltage. Switching states of the three-phase are clamped alternatively to reduce both the CMV and the switching loss. Secondly, the carriers are also modified by the phase opposite disposition of the upper and lower carriers. The extra switching at the border of two adjacent regions in the space vector diagram is reduced. Meanwhile, a neutral-point voltage (NPV) control method is also presented. The duty cycle of the switching state that affects the NPV is adjusted to obtain the balance control of the NPV. Still, the switching sequence in each carrier period remains the same. Finally, the feasibility and effectiveness of the proposed DPWM strategy are tested on a rapid control prototype platform based on RT-Lab.

Analysis of the influence of three-phase asynchronization recording on fault location of distribution network

In order to improve the practical effect of the fault location technology, it is necessary to analyze the error caused by the three-phase asynchronization of the fault indicator recording. The influence of the three-phase recording asynchronization on the fault location of the distribution network is analyzed from the aspects of the start-up criterion, the error level of the zero-sequence current and the zero-sequence voltage. The simulation results show that fault location devices of different principles are affected differently by the asynchronization recording. In order to avoid mistake start-up of the fault location device, the change value should be used to construct the fault location start-up criterion. Meanwhile, the measurement accuracy of transient fault characteristics will be affected to a certain extent by the asynchronization of the fault indicator recording, but it has little effect on the reliability of fault location, and it can even make the fault characteristics more obvious after the single- phase fault occurs.

Three-Level Unidirectional Rectifiers under Non-Unity Power Factor Operation and Unbalanced Split DC-Link Loading: Analytical and Experimental Assessment

Three-phase three-level unidirectional rectifiers are among the most adopted topologies for general active rectification, achieving an excellent compromise between cost, complexity and overall performance. The unidirectional nature of these rectifiers negatively affects their operation, e.g., distorting the input currents around the zero-crossings, limiting the maximum converter-side displacement power factor, reducing the split DC-link mid-point current capability and limiting the converter ability to compensate the low-frequency DC-link mid-point voltage oscillation. In particular, the rectifier operation under non-unity power factor and/or under constant zero-sequence voltage injection (i.e., when unbalanced split DC-link loading occurs) typically yields large and uncontrolled input current distortion, effectively limiting the acceptable operating region of the converter. Although high bandwidth current control loops and enhanced phase current sampling strategies may improve the rectifier input current distortion, especially at light load, these approaches lose effectiveness when significant phase-shift between voltage and current is required and/or a constant zero-sequence voltage must be injected. Therefore, this paper proposes a complete analysis and performance assessment of three-level unidirectional rectifiers under non-unity power factor operation and unbalanced split DC-link loading. First, the theoretical operating limits of the converter in terms of zero-sequence voltage, modulation index, power factor angle, maximum DC-link mid-point current and minimum DC-link mid-point charge ripple are derived. Leveraging the derived zero-sequence voltage limits, a unified carrier-based pulse-width modulation (PWM) approach enabling the undistorted operation of the rectifier in all feasible operating conditions is thus proposed. Moreover, novel analytical expressions defining the maximum rectifier mid-point current capability and the minimum peak-to-peak DC-link mid-point charge ripple as functions of both modulation index and power factor angle are derived, the latter enabling a straightforward sizing of the split DC-link capacitors. The theoretical analysis is verified on a 30 kW, 20 kHz T-type rectifier prototype, designed for electric vehicle ultra-fast battery charging. The input phase current distortion, the maximum mid-point current capability and the minimum mid-point charge ripple are experimentally assessed across all rectifier operating points, showing excellent performance and accurate agreement with the analytical predictions.

Deadbeat Predictive Current Control for Series-Winding PMSM Drive with Half-Bridge Power Module-Based Inverter

Series-winding topology (SWT) could improve the DC-link voltage utilization, as open-winding topology does. Meanwhile, it can greatly reduce the number of power devices. Firstly, for the half-bridge power modules (HBPMs)-based inverter, an N-phase series-winding motor only requires N+1 HBPMs for driving. On the other hand, such SWT also brings new challenges to the drive system. A zero-sequence loop is introduced into the motor windings due to SWT. The generated zero-sequence current would degrade the total harmonic distortion of the phase currents and produce the additional torque ripple. Moreover, current sensors are typically integrated with the HBPMs. However, in SWT, their measured results are the leg currents of the inverter, not the phase currents of the motor, which is crucial to the motor control. Thus, this paper mainly focuses on the aforementioned problems in a three-phase series-winding permanent-magnet synchronous motor (TPSW-PMSM) drive with HBPM-based inverter. Firstly, to control the zero-sequence subspace, the voltage vector distribution of TPSW-PMSM is analyzed. In addition, two voltage vectors with zero-sequence components are selected to generate the zero-sequence voltage. Then, the phase currents are reconstructed according to the leg currents from the current sensors on HBPMs. Based on the above, the deadbeat predictive current control (DBPCC) scheme is proposed for a TPSW-PMSM drive with HBPM-based inverter. It provides the TPSW-PMSM drive with fast dynamic response and effective zero-sequence current suppression. Finally, both simulation and experimental results verify the feasibility and effectiveness of the proposed DBPCC scheme.