scholarly journals Equivalent Space Vector Output of Diode Clamped Multilevel Inverters Through Modulation Wave Decomposition Under Carrier-Based PWM Strategy

IEEE Access ◽  
2020 ◽  
Vol 8 ◽  
pp. 104918-104932 ◽  
Author(s):  
Yingjie He ◽  
Yunfeng Liu ◽  
Chao Lei ◽  
Jinjun Liu
Author(s):  
D. Sandhya Rani ◽  
A. Appaprao

Multilevel inverters are increasingly being used in high-power medium voltage applications due to their superior performance compared to two-level inverters. Among various modulation techniques for a multilevel inverter, the space vector pulse width modulation (SVPWM) is widely used. The complexity is due to the difficulty in determining the location of the reference vector, the calculation of ontimes, and the determination and selection of switching states. This paper proposes a general SVPWM algorithm for multilevel inverters based on standard two-level SVPWM. Since the proposed multilevel SVPWM method uses two-level modulation to calculate the on-times, the computation of on-times for an n-level inverter becomes easier. The proposed method uses a simple mapping to achieve the SVPWM for a multilevel inverter. A general n-level implementation is explained, and experimental results are given for two-level and three-level inverters.


Author(s):  
R. Palanisamy ◽  
A. Velu ◽  
K. Selvakumar ◽  
D. Karthikeyan ◽  
D. Selvabharathi ◽  
...  

This paper deals the implementation of 3-level output voltage using dual 2-level inverter with control of sub-region based Space Vector Modulation (SR-SVM). Switching loss and voltage stress are the most important issues in multilevel inverters, for keep away from these problems dual inverter system executed. Using this proposed system, the conventional 3-level inverter voltage vectors and switching vectors can be located. In neutral point clamped multilevel inverter, it carries more load current fluctuations due to the DC link capacitors and it requires large capacitors. Based on the sub-region SVM used to control IGBT switches placed in the dual inverter system. The proposed system improves the output voltage with reduced harmonic content with improved dc voltage utilisation. The simulation and hardware results are verified using matlab/simulink and dsPIC microcontroller.


Author(s):  
Hongjian Lin ◽  
Mahmoud Mehrabankhomartash ◽  
Fan Yang ◽  
Maryam Saeedifard ◽  
Jiangpeng Yang ◽  
...  

2014 ◽  
Vol 7 (6) ◽  
pp. 1590-1602 ◽  
Author(s):  
Yilmaz Sozer ◽  
David A. Torrey ◽  
Aparna Saha ◽  
Hung Nguyen ◽  
Nathaniel Hawes

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