Broadening 3-bit Burst Error-Correction Codes with Quadruple Adjacent Error Correction

Author(s):  
S.V.S. Prasad ◽  
P.B. Natarajan ◽  
L.Bhavani Shankar
Author(s):  
Jiaqiang Li ◽  
Pedro Reviriego ◽  
Liyi Xiao ◽  
Costas Argyrides ◽  
Jie Li

2019 ◽  
Vol 8 (2S8) ◽  
pp. 1948-1952

The developments in IC technology and rapid increase of transistor densities and scaling factor, the use of ECC’s acquired prominence. Multiple bit errors in memories due to technology scaling demands advanced error correction codes. SEC-DEC, DEC, burst error detection, Golay code, Reed Solmon codes etc. have much decoding complexity and latency. The above drawbacks can be reduced with OLS codes. OLS codes with majority logic decoding technique, modular construction and simple decoding mechanisms it enables low delay improvements. MBU’S can be addressed using OLS-MLD codes. This paper presents a detail study of developments in multibit ECC’s using OLS-MLD mechanism


2019 ◽  
Vol 35 (3) ◽  
pp. 413-420
Author(s):  
Jiaqiang Li ◽  
Pedro Reviriego ◽  
Liyi Xiao

Sensors ◽  
2021 ◽  
Vol 21 (6) ◽  
pp. 2009
Author(s):  
Fatemeh Najafi ◽  
Masoud Kaveh ◽  
Diego Martín ◽  
Mohammad Reza Mosavi

Traditional authentication techniques, such as cryptographic solutions, are vulnerable to various attacks occurring on session keys and data. Physical unclonable functions (PUFs) such as dynamic random access memory (DRAM)-based PUFs are introduced as promising security blocks to enable cryptography and authentication services. However, PUFs are often sensitive to internal and external noises, which cause reliability issues. The requirement of additional robustness and reliability leads to the involvement of error-reduction methods such as error correction codes (ECCs) and pre-selection schemes that cause considerable extra overheads. In this paper, we propose deep PUF: a deep convolutional neural network (CNN)-based scheme using the latency-based DRAM PUFs without the need for any additional error correction technique. The proposed framework provides a higher number of challenge-response pairs (CRPs) by eliminating the pre-selection and filtering mechanisms. The entire complexity of device identification is moved to the server side that enables the authentication of resource-constrained nodes. The experimental results from a 1Gb DDR3 show that the responses under varying conditions can be classified with at least a 94.9% accuracy rate by using CNN. After applying the proposed authentication steps to the classification results, we show that the probability of identification error can be drastically reduced, which leads to a highly reliable authentication.


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