Author(s):  
Norimichi Chinone ◽  
Yasuo Cho

Abstract Gate-bias dependent depletion layer distribution and carrier distributions in cross-section of SiC power MOSFET were measured by newly developed measurement system based on super-higher-order scanning nonlinear dielectric microscope. The results visualized gate-source voltage dependent redistribution of depletion layer and carrier.


Author(s):  
Jun Hirota ◽  
Ken Hoshino ◽  
Tsukasa Nakai ◽  
Kohei Yamasue ◽  
Yasuo Cho

Abstract In this paper, the authors report their successful attempt to acquire the scanning nonlinear dielectric microscopy (SNDM) signals around the floating gate and channel structures of the 3D Flash memory device, utilizing the custom-built SNDM tool with a super-sharp diamond tip. The report includes details of the SNDM measurement and process involved in sample preparation. With the super-sharp diamond tips with radius of less than 5 nm to achieve the supreme spatial resolution, the authors successfully obtained the SNDM signals of floating gate in high contrast to the background in the selected areas. They deduced the minimum spatial resolution and seized a clear evidence that the diffusion length differences of the n-type impurity among the channels are less than 21 nm. Thus, they concluded that SNDM is one of the most powerful analytical techniques to evaluate the carrier distribution in the superfine three dimensionally structured memory devices.


Author(s):  
N. Chinone ◽  
Y. Cho ◽  
R. Kosugi ◽  
Y. Tanaka ◽  
S. Harada ◽  
...  

Abstract A new technique for local deep level transient spectroscopy (DLTS) imaging using super-higher-order scanning nonlinear dielectric microscopy is proposed. Using this technique. SiCVSiC structure samples with different post oxidation annealing conditions were measured. We observed that the local DLTS signal decreases with post oxidation annealing (POA), which agrees with the well-known phenomena that POA reduces trap density. Furthermore, obtained local DLTS images had dark and bright areas, which is considered to show the trap distribution at/near SiCVSiC interface.


1995 ◽  
Vol 31 (21) ◽  
pp. 1814-1815 ◽  
Author(s):  
A.T. Findikoglu ◽  
D.W. Reagor ◽  
Q.X. Jia ◽  
X.D. Wu

Author(s):  
Majid Rezaei ◽  
Bernhard G. Mitterwallner ◽  
Philip Loche ◽  
Yuki Uematsu ◽  
Roland R. Netz ◽  
...  

2020 ◽  
Vol 128 (24) ◽  
pp. 244105
Author(s):  
Yoshiomi Hiranaga ◽  
Takanori Mimura ◽  
Takao Shimizu ◽  
Hiroshi Funakubo ◽  
Yasuo Cho
Keyword(s):  

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