Reliability, solderability and electrical performance of high density ultra thin capacitors based on carbon nanofibers

Author(s):  
Victor Marknas ◽  
Rickard Andersson ◽  
Maria Bylund ◽  
Qi Li ◽  
Elisa Passalacqua ◽  
...  
Author(s):  
Hung-Chun Kuo ◽  
Ming-Fong Jhong ◽  
Hung-Hsiang Cheng ◽  
Chen-Chao Wang ◽  
Chih-Pin Hung

2014 ◽  
Vol 2014 (1) ◽  
pp. 000141-000147 ◽  
Author(s):  
John M. Lauffer ◽  
Kevin Knadle

Common themes across all segments of electronic packaging today are density and performance. High density interconnect (HDI) technology is one of the most commonly utilized methods for electronic package density improvement, while many different areas have been investigated for performance improvement, from low loss dielectric and conductor materials, to via design and via stub reduction. Electrical performance and density requirements are sometimes complementary, but often times, conflicting with one another. This paper will describe the design, materials, fabrication, and reliability of a new Z-Interconnect technology that addresses both high density and high performance demands simultaneously. Z-Interconnect technology uses an electrically conductive adhesive to electrically interconnect several cores (Full Z) or sub-composites (Sub Z) in a single lamination process. Z-Interconnect technology will be compared and contrasted to other commonly used solutions to the performance and density challenges. HDI or sequential build-up technology is a pervasive solution to the density demands in semiconductor packaging and consumer electronics (e.g. Smart phones), but has not caught hold in HPC or A&D printed wiring board (PWB) applications. One solution for PWB electrical performance enhancement is plated through hole (PTH) stub reduction by “back drilling” the unwanted portion of the PTH. Pb-free reflow and Current Induced Thermal Cycling (CITC) test results of product coupons and specially designed test vehicles, having component pitches down to 0.4mm, will be presented. Z-Interconnect test vehicles have survived 6X Pb-free (260C) reflow cycles, followed by greater than 3000 cycles of 23C–150C CITC cycles. Test vehicle and product coupons also easily survive 10 or more 23C–260C CITC cycles.


2015 ◽  
Vol 2015 (1) ◽  
pp. 1-5 ◽  
Author(s):  
Dyi-Chung Hu ◽  
Yu-Min Lin ◽  
Hsiang Hung Chang ◽  
Tao-Chih Chang ◽  
Wei-Chung Lo ◽  
...  

A new concept of packaging platform calls eHDF (embedded high density film), that without any TXVs is been proposed. The eHDF uses the technology from two categories; one utilize the semiconductor fine line technology infrastructure and the other takes the advantage of laminate organic large panel process infrastructure. Hence, the fine line, better electrical performance and low cost requirements can be addressed at the same time by the eHDF packaging platform. In this paper, a test vehicle based on eHDF structure will be built and modules assembly with test chips on eHDF substrate will be performed.


2010 ◽  
Vol 87 (12) ◽  
pp. 2544-2548 ◽  
Author(s):  
Edson J. Carvalho ◽  
Marco A.R. Alves ◽  
Edmundo S. Braga ◽  
Lucila Cescato

nano Online ◽  
2018 ◽  
Author(s):  
Mircea Chipara ◽  
Brian Jones ◽  
Dorina M. Chipara ◽  
Jianhua Li ◽  
Karen Lozano ◽  
...  

2013 ◽  
Vol 2013 (1) ◽  
pp. 000158-000165
Author(s):  
Rabindra N. Das ◽  
Frank D. Egitto ◽  
How Lin

The medical industry is clearly and urgently in need of development of advanced packaging that can meet the growing demand for miniaturization, high-speed performance, and flexibility for handheld, portable, in vivo, and implantable devices. To accomplish this, new packaging structures need to be able to integrate more dies with greater function, higher I/O counts, smaller die pad pitches, and high reliability, while being pushed into smaller and smaller footprints. As a result, the microelectronics industry is moving toward alternative, innovative approaches as solutions for squeezing more function into smaller packages. This paper discusses the development of advanced packaging that can meet the growing demand for miniaturization, high-speed performance, and flexibility for miniaturized electronic devices. In particular, recent developments in high density interconnect (HDI) substrate technology are highlighted. System-in-Package (SiP), embedded passives, stacked packages, and flex substrates are utilized to achieve significant reduction in size, weight, and power (SWaP) consumption in electronic devices. The paper also describes a novel approach for the fabrication of silicone-coated flexible substrates to provide biocompatibility for implantable devices. In particular, we highlight recent developments on silicone coatings on high density, miniaturized polyimide-based flexible electronics. A variety of high density circuits ranging from 11 microns lines/space to 25 microns lines/spaces were processed on polyimide flex substrates and subsequently coated with biocompatible silicone coatings. The electrical performance of silicone coated batteries was characterized by voltage measurements. The final structure enhances the stretching capability. Fabrication of advanced medical substrates incorporating technologies for parts authentication (anticounterfeit measures) such as embedded signature circuits and use of nano or micro materials as signatures are discussed. In some instances, these measures do not add cost to package fabrication.


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