A sub-1-V ultra-low power full CMOS bandgap reference woking in subthreshold region

2014 ◽  
Author(s):  
Qing Ding ◽  
Pengpeng Yuan ◽  
Dongmei Li ◽  
Zhihua Wang
Keyword(s):  
Low Power ◽  
Bandgap Reference ◽  
Subthreshold Region ◽  
Ultra Low Power

scholarly journals Subthreshold Region based Linear Feedback Shift Register

2019 ◽  
Vol 8 (6S2) ◽  
pp. 817-821
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Power Dissipation ◽  
High Speed ◽  
System Level ◽  
Linear Feedback ◽  
Portable Devices ◽  
Subthreshold Region ◽  
Flip Flop ◽  
Ultra Low Power

Growing demand for portable devices and fast increases in complexity of chip cause power dissipation is an important parameter. Power consumption and dissipation or generations of more heat possess a restriction in the direction of the integration of more transistors. Several methods have been proposed to reduce power dissipation from system level to device level. Subthreshold circuits are widely used in more advanced applications due to ultra low-power consumption. The present work targets on construction of linear feedback shift registers (LFSR) in weak inversion region and their performance observed in terms of parameters like power delay product (PDP). In CMOS circuits subthreshold region of operation allows a low-power for ample utilizations but this advantage get with the penalty of flat speed. For the entrenched and high speed applications, improving the speed of subthreshold designs is essential. To enhance this, operate the devices at maximum current over capacitance. LFSR architectures build with various types of D flip flop and XOR gate circuits are analyzed. Circuit level Simulation is carried out using 130 nm technologies.

Stability Improvement Method For Ultra-Low-Power Bandgap Reference

2020 ◽  
Author(s):  
Arthur Kh. Mkhitaryan ◽  
Hakob T. Kostanyan ◽  
Hayk T. Grigoryan ◽  
Hayk V. Margaryan ◽  
Harutyun G. Kirakosyan ◽  
...  
Keyword(s):  
Low Power ◽  
Bandgap Reference ◽  
Ultra Low Power ◽  
Improvement Method

scholarly journals Device and Circuit Design Challenges in the Digital Subthreshold Region for Ultralow-Power Applications

VLSI Design ◽  
2009 ◽  
Vol 2009 ◽  
pp. 1-14 ◽  
Author(s):  
Ramesh Vaddi ◽  
S. Dasgupta ◽  
R. P. Agarwal
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Circuit Design ◽  
High Performance ◽  
Device Structure ◽  
Subthreshold Region ◽  
Ultra Low Power ◽  
Sensor Applications ◽  
Subthreshold Operation ◽  
Design Challenges

In recent years, subthreshold operation has gained a lot of attention due to ultra low-power consumption in applications requiring low to medium performance. It has also been shown that by optimizing the device structure, power consumption of digital subthreshold logic can be further minimized while improving its performance. Therefore, subthreshold circuit design is very promising for future ultra low-energy sensor applications as well as high-performance parallel processing. This paper deals with various device and circuit design challenges associated with the state of the art in optimal digital subthreshold circuit design and reviews device design methodologies and circuit topologies for optimal digital subthreshold operation. This paper identifies the suitable candidates for subthreshold operation at device and circuit levels for optimal subthreshold circuit design and provides an effective roadmap for digital designers interested to work with ultra low-power applications.

scholarly journals A High-Accuracy Ultra-Low-Power Offset-Cancelation On-Off Bandgap Reference for Implantable Medical Electronics

Electronics ◽  
2019 ◽  
Vol 8 (7) ◽  
pp. 814 ◽  
Author(s):  
Jiangtao Xu ◽  
Yawei Wang ◽  
Minshun Wu ◽  
Ruizhi Zhang ◽  
Sufen Wei ◽  
...  
Keyword(s):  
Low Power ◽  
Supply Voltage ◽  
Sampling Strategy ◽  
High Accuracy ◽  
Cmos Process ◽  
Medical Electronics ◽  
Bandgap Reference ◽  
Ultra Low Power ◽  
Voltage Range ◽  
Average Current

An ultra-low-power and high-accuracy on-off bandgap reference (BGR) is demonstrated in this paper for implantable medical electronics. The proposed BGR shows an average current consumption of 78 nA under 2.8 V supply and an output voltage of 1.17 V with an untrimmed accuracy of 0.69%. The on-off bandgap combined with sample-and-hold switched-RC filter is developed to reduce power consumption and noise. The on-off mechanism allows a relatively higher current in the sample phase to alleviate the process variation of bipolar transistors. To compensate the error caused by operational amplifier offset, the correlated double sampling strategy is adopted in the BGR. The proposed BGR is implemented in 0.35 μm standard CMOS process and occupies a total area of 0.063 mm2. Measurement results show that the circuit works properly in the supply voltage range of 1.8–3.2 V and achieves a line regulation of 0.59 mV/V. When the temperature varies from −20 to 80 °C, an average temperature coefficient of 19.6 ppm/°C is achieved.

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