ICML: Machine Learning-based Transistor-level Integrated Circuit Layout Error Classification using Color Analysis and Segmentation

Author(s):  
Rodolfo C. Salvador ◽  
Melvin K. Cabatuan ◽  
Ronnie Concepcion ◽  
Lorena Ilagan ◽  
Christian Roque
Polymers ◽  
2021 ◽  
Vol 13 (3) ◽  
pp. 353
Author(s):  
Kun-Cheng Ke ◽  
Ming-Shyan Huang

Conventional methods for assessing the quality of components mass produced using injection molding are expensive and time-consuming or involve imprecise statistical process control parameters. A suitable alternative would be to employ machine learning to classify the quality of parts by using quality indices and quality grading. In this study, we used a multilayer perceptron (MLP) neural network along with a few quality indices to accurately predict the quality of “qualified” and “unqualified” geometric shapes of a finished product. These quality indices, which exhibited a strong correlation with part quality, were extracted from pressure curves and input into the MLP model for learning and prediction. By filtering outliers from the input data and converting the measured quality into quality grades used as output data, we increased the prediction accuracy of the MLP model and classified the quality of finished parts into various quality levels. The MLP model may misjudge datapoints in the “to-be-confirmed” area, which is located between the “qualified” and “unqualified” areas. We classified the “to-be-confirmed” area, and only the quality of products in this area were evaluated further, which reduced the cost of quality control considerably. An integrated circuit tray was manufactured to experimentally demonstrate the feasibility of the proposed method.


Author(s):  
Jefferson Talledo

This paper discusses the characterization of an integrated circuit (IC) silicon die fracture strength to have a realistic die crack assessment. The evaluation was conducted using a 3-point bend test setup to measure the die strength of actual IC dies. Both the active side and the back side of the IC die were tested for 2 types of dies with different active side circuit layout. Results showed that the difference in the die active side circuit layout or structure has impact on die strength. It was also found that the active side was weaker than the back side. This implies that both the active side and the back side of an actual IC die must be subjected to fracture strength characterization to have an assessment that would be in a better agreement with real condition. Using only the strength of the back side would result in over-estimating the die strength. The common approach of using the fracture strength of the die back side to characterize the die strength is not realistic and can mislead the assessment of die crack or semiconductor package robustness.


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