Study on doping profile and scaling characteristics of gate and channel engineered symmetric double gate MOSFET

Author(s):  
Md. Arafat Mahmud ◽  
Md. Tashfiq Bin Kashem ◽  
Samia Subrina
2015 ◽  
Vol 36 ◽  
pp. 51-63 ◽  
Author(s):  
Vandana Kumari ◽  
Manoj Saxena ◽  
Mridula Gupta

This work presents the drain current model using Evanescent Mode Analysis (EMA) for nanoscale Double Gate MOSFET having Gaussian doping profile along the horizontal direction in the channel i.e. from source to drain region. Due to heavily doped channel, band gap narrowing effect is incorporated in the analytical modeling scheme. The various parameters evaluated in this work using analytical modeling scheme are surface potential, electric field, threshold voltage, sub-threshold slope and drain current. The impact of peak Gaussian doping profile on the drain current and trans-conductance has been demonstrated which are important for assessing the analog performance of the device. The results are also compared with the uniformly doped DG MOSFET. The asymmetric behaviour of Gaussian doped DG MOSFET has also been investigated. In addition to this, digital performance of Gaussian doped DG MOSFET has also been assessed using exhaustive device simulation.


Author(s):  
Hakkee Jung ◽  

—The variation of subthreshold swing(SS) according to the projected range (Rp ) and standard projected deviation (σp ) was analyzed when the symmetrical junctionless double gate (JLDG) MOSFET was doped with Gaussian doping profile. For this purpose, the analytical SS model was presented. We compared with the TCAD results to turn out the validity of this model, and the SSs of this model agreed with those of TCAD. The effective conduction path and mean doping concentration affecting the SS were analyzed according to the Rp and σp . As a result, the SS increased as the Rp and σp increased simultaneously. The smaller the Rp and the larger the σp , the lower the SS. When Rp = 1.5 nm, it showed the SS below 100mV/dec without being affected by the change of σp or silicon thickness. When σp = 3nm, it was also 100mV/dec or less regardless of the change of Rp and silicon thickness. Keywords— Double gate, Junctionless, Subthreshold swing, Gaussian, Projected range, Standard projected deviation


Author(s):  
Hak-Kee Jung ◽  
Ji-Hyung Han ◽  
Jae-Hyung Lee ◽  
Dong-Soo Jeong ◽  
Jong-In Lee ◽  
...  

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