New 3-level submodules for a modular multilevel converter based HVDC system with advanced features

Author(s):  
Ashish Kumar Sahoo ◽  
Ruben Otero-De-Leon ◽  
Visweshwar Chandrasekaran ◽  
Ned Mohan

Real time simulators play a major role in R&D of Offshore wind farm connected modular multilevel converter (MMC)-HVDC system. These simulators are used for testing the actual prototype of controllers or protection equipment required for the system under study. Modular multilevel converter comprises of number of sub modules (SMs) like Half/ full bridge cells. While computing time domain Electromagnetic transients (EMTs) with the system having large number of SMs pose a great challenge. This computational burden will be more when simulated in real time. To overcome this, several authors proposed equivalent mathematical model of MMC. This paper proposes the real time simulation start-up of offshore wind farm connected modular multilevel converter (MMC)-HVDC system. This paper also describes about how the above said systems is simulated in OPAL-RT based Hypersim software.


2014 ◽  
Vol 535 ◽  
pp. 153-156
Author(s):  
Ya Ai Chen ◽  
Peng Chen ◽  
Jing Hua Zhou

The thesis mainly analyzes the topology structure and the working principle of MMC based VSC-HVDC system; introduces the characteristics and research status of its capacitor voltage balancing control. All of this will lay a foundation for the further research.


Modular multilevel converter consists of hundreds of submodules (SMs) like half bridge and full bridge converters etc. These hundreds of SMs and electrical nodes poses challenges while computing electromagnetic transients (EMTs). This problem becomes more complex while computed in real-time. To overcome this, an equivalent topology to model MMC arm/valve called surrogate network is utilized. But, the major ambiguity integrated with surrogate network model is SM capacitor voltage balancing. This leads to variation in voltage among the three phases which are parallel and produces circulating current between the three phases. A control circuitry is proposed in this paper to suppress/minimize circulating currents between the phases. Apart from circulating current suppression, the ‘ac’ output voltage is also enhanced at the converter with this proposed controller. Simulation is carried out in RSCAD software using RTDS simulator.


Energies ◽  
2021 ◽  
Vol 15 (1) ◽  
pp. 184
Author(s):  
Sehyun Kim ◽  
Kyeon Hur ◽  
Jongseo Na ◽  
Jongsu Yoon ◽  
Heejin Kim

This paper proposes a generic analysis framework for a grid supporting modular multilevel converter (MMC)-high voltage DC (HVDC) in a multi-infeed of line commutated converter (LCC) and MMC (MILM) system. MMC-HVDC can support the grid by compensating for the exact reactive power consumptions within the MMC-HVDC system and the varying power system conditions in the MILM system. Maximum active/reactive power capability (MPQC) curve and PQ loading curve comparison process is introduced to properly design a grid supporting MMC-HVDC. While the MPQC curve presents the maximum PQ range of the MMC-HVDC system based on the submodule capacitance value and the modulation index, the PQ loading curve presents the reactive power requirement from the power system that MMC-HVDC needs to compensate. Finally, the comparison of these two curves yields the proper value of submodule capacitance and the modulation index for sufficiently supporting the MILM system. The proposed framework is validated with detailed PSCAD/EMTDC simulation; it demonstrated that it could be applied to various power system conditions.


2019 ◽  
Vol 9 (8) ◽  
pp. 1661 ◽  
Author(s):  
Kaipei Liu ◽  
Qing Huai ◽  
Liang Qin ◽  
Shu Zhu ◽  
Xiaobing Liao ◽  
...  

The main weakness of the half-bridge modular multilevel converter-based high-voltage direct current (MMC-HVDC) system lies in its immature solution to extremely high current under direct current (DC) line fault. The development of the direct current circuit breaker (DCCB) remains constrained in terms of interruption capacity and operation speed. Therefore, it is essential to limit fault current in the MMC-HVDC system. An enhanced fault current-limiting circuit (EFCLC) is proposed on the basis of fault current study to restrict fault current under DC pole-to-pole fault. Specifically, the EFCLC consists of fault current-limiting inductance L F C L and energy dissipation resistance R F C L in parallel with surge arrestor. L F C L reduces the fault current rising speed, together with arm inductance and smoothing reactor. However, in contrast to arm inductance and smoothing reactor, L F C L will be bypassed via parallel-connected thyristors after blocking converter to prevent the effect on fault interruption speed. R F C L shares the stress on energy absorption device (metal oxide arrester) to facilitate fault interruption. The DCCB requirement in interruption capacity and breaking speed can be satisfied effortlessly through the EFCLC. The working principle and parameter determination of the EFCLC are presented in detail, and its effectiveness is verified by simulation in RT-LAB and MATLAB software platforms.


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