Design of low-power and high slew-rate error amplifier for fast transient CMOS buck converters

Author(s):  
Pang-Jung Liu ◽  
Yu-Chi Hsu
2016 ◽  
Vol 9 (10) ◽  
pp. 2147-2153 ◽  
Author(s):  
Pang‐Jung Liu ◽  
Tzu‐Hsuan Chen ◽  
Shang‐Ru Hsu

2015 ◽  
Vol 46 (8) ◽  
pp. 740-749 ◽  
Author(s):  
Chee-Cheow Lim ◽  
Nai-Shyan Lai ◽  
Gim-Heng Tan ◽  
Harikrishnan Ramiah

2021 ◽  
Vol 11 (2) ◽  
pp. 19
Author(s):  
Francesco Centurelli ◽  
Riccardo Della Sala ◽  
Pietro Monsurrò ◽  
Giuseppe Scotti ◽  
Alessandro Trifiletti

In this paper, we present a novel operational transconductance amplifier (OTA) topology based on a dual-path body-driven input stage that exploits a body-driven current mirror-active load and targets ultra-low-power (ULP) and ultra-low-voltage (ULV) applications, such as IoT or biomedical devices. The proposed OTA exhibits only one high-impedance node, and can therefore be compensated at the output stage, thus not requiring Miller compensation. The input stage ensures rail-to-rail input common-mode range, whereas the gate-driven output stage ensures both a high open-loop gain and an enhanced slew rate. The proposed amplifier was designed in an STMicroelectronics 130 nm CMOS process with a nominal supply voltage of only 0.3 V, and it achieved very good values for both the small-signal and large-signal Figures of Merit. Extensive PVT (process, supply voltage, and temperature) and mismatch simulations are reported to prove the robustness of the proposed amplifier.


2020 ◽  
Vol 67 (11) ◽  
pp. 4075-4084
Author(s):  
Ze-Kun Zhou ◽  
Anqi Wang ◽  
Yunkun Wang ◽  
Jiani Wang ◽  
Yue Shi ◽  
...  

2020 ◽  
Vol 55 (11) ◽  
pp. 3076-3086 ◽  
Author(s):  
Kan Li ◽  
Chuanshi Yang ◽  
Ting Guo ◽  
Yuanjin Zheng

Author(s):  
Hong-wei Huang ◽  
Hsin-hsin Ho ◽  
Chieh-ching Chien ◽  
Ke-horng Chen ◽  
Gin-kou Ma ◽  
...  

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