ABSTRACTMetal contamination level will be decreased in order to maintain a device
reliability according to device size reduction. Metal contamination from
various processes are surveyed. The influence of metal contamination for
7–15nm thick gate oxides is discussed in order to clarify the critical
concentration to gate oxides. NIG(Non Intrinsic Gettering) substrates are
used in a worst case for gettering. Fe contamination with 4×1010
cm−2 strongly affects the TDDM characteristics, although there
is no serious influence in the breakdown voltage even at the concentration
of 5×1011 cm−2. The same tendency is observed for Cu
contaminant and the critical concentration for TDDB characteristics is
around 3×1011 cm−2. High energy B implantation is
carried out to form gettering sites near device region. Breakdown voltage
and TDDB characteristics are almost the same as epitaxial substrates at Fe
concentration up to l×1012 Cm−2. Detailed examination
such as SIMS, C-t and DLTS measurements is also supported the effectiveness
in high energy gettering.
Statistical approach for determining impulse breakdown voltage distribution under DC sweep voltage