A 6Gb/s/pin pseudo-differential signaling using common-mode noise rejection techniques without reference signal for DRAM interfaces

2009 ◽  
Author(s):  
Kyung-Soo Ha ◽  
Lee-Sup Kim ◽  
Seung-Jun Bae ◽  
Kwang-Il Park ◽  
Joo Sun Choi ◽  
...  
Keyword(s):  
Reference Signal ◽  
Common Mode ◽  
Noise Rejection ◽  
Differential Signaling

scholarly journals Common-Mode Noise Reduction in Noncontact Biopotential Acquisition Circuit Based on Imbalance Cancellation of Electrode-Body Impedance

Sensors ◽  
2020 ◽  
Vol 20 (24) ◽  
pp. 7140
Author(s):  
Minghui Chen ◽  
Jianqing Wang ◽  
Daisuke Anzai ◽  
Georg Fischer ◽  
Jens Kirchner
Keyword(s):  
Noise Reduction ◽  
Limiting Factor ◽  
Interference Immunity ◽  
Common Mode ◽  
Promising Alternative ◽  
Noise Rejection ◽  
Sensing Technology ◽  
Machine Interface ◽  
Body Impedance

Biopotential sensing technology with electrodes has a great future in medical treatment and human—machine interface, whereas comfort and longevity are two significant problems during usage. Noncontact electrode is a promising alternative to achieve more comfortable and long term biopotential signal recordings than contact electrode. However, it could pick up a significantly higher level of common-mode (CM) noise, which is hardly solved with passive filtering. The impedance imbalance at the electrode-body interface is a limiting factor of this problem, which reduces the common mode rejection ratio (CMRR) of the amplifier. In this work, we firstly present two novel CM noise reduction circuit designs. The circuit designs are based on electrode-body impedance imbalance cancellation. We perform circuit analysis and circuit simulations to explain the principles of the two circuits, both of which showed effectiveness in CM noise rejection. Secondly, we proposed a practical approach to detect and monitor the electrode-body impedance imbalance change. Compared with the conventional approach, it has certain advantages in interference immunity, and good linearity for capacitance. Lastly, we show experimental evaluation results on one of the designs we proposed. The results indicated the validity and feasibility of the approach.

scholarly journals Perancangan Low Noise Hydrophone Preamp untuk Pengujian Akustik Noise Propeller

2019 ◽  
Vol 6 (2) ◽  
pp. 71-77
Author(s):  
Totok Soedarto ◽  
Taufiq Setyanto
Keyword(s):  
Low Noise ◽  
Common Mode ◽  
Noise Rejection ◽  
Cavitation Tunnel

Perancangan rangkaian Low Noise Balanced Hydrophone Preamp ini adalah digunakan untuk uji analisis noise yang dihasilkan oleh propeller kapal selam mini yang digunakan untuk berpatroli tanpa diketahui oleh pihak lain. Karena kontribusi penghasil noise terbesar adalah propeller, maka untuk uji analisis noise propeller ini dibutuhkan rangkaian preamp yang mempunyai noise sangat rendah serta mic hydrophone yang ditempatkan dalam cavitation tunnel yang digunakan untuk menangkap sinyal-sinyal noise yang dihasilkan propeller. Perancangan preamp nya berdasarkan konfigurasi diferensial transistor dengan common mode (floating) gain kontrol yang terhubung pada kaki-kaki emitter dari pasangan transistor. Rangkaian differensialnya adalah rangkaian diferensial in dan out, karena itu memerlukan balanced to unbalanced buffer sebagai penyangga keseimbangan untuk rangkaian tahap berikutnya. Rangkaian didesain dengan sederhana tapi  memiliki noise yang sangat rendah, bahkan sangat dekat dengan minimum teoritis, serta memiliki  penolakan hum (noise rejection) yang  tinggi dan dilengkapi variabel gain dengan potensio rotary tunggal

scholarly journals Design of 16-Bit SAR ADC Using DTMOS Technique

2021 ◽  
Vol 12 (3) ◽  
pp. 3046-3054
Author(s):  
Yarlagadda Archana Et.al
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Power Supply ◽  
Sar Adc ◽  
Differential Amplifier ◽  
Common Mode ◽  
Biomedical Implant ◽  
Low Leakage ◽  
Noise Rejection ◽  
Proper Operation

This paper presents a 16-bit 100MS/s SAR ADC with 1V power supply for biomedical implant systems developed with low power technique i.e., DTMOS logic. It consists of a R-2R DAC, low-power comparator, a digital SAR logic with low-leakage. The designed comparator is a differential architecture that has used to have an excellent, common-mode noise rejection. Comparator was created for proper operation to remain in saturation and could be used with differential amplifier. The comparator is the chief block of power consumption, so we focused mainly much of ability we make to design this module. The ADC is designed using Cadence virtuoso with CMOS 45nm technology. For SFDR, SNR, ENOB and power consumption, the converter utilizes 63.97dB, 51.06 dB, 15.15 and 528.8uw.

A 1-V 3.8-5.7-GHz wide-band VCO with differentially tuned accumulation MOS varactors for common-mode noise rejection in CMOS SOI technology

2003 ◽  
Vol 51 (8) ◽  
pp. 1952-1959 ◽  
Author(s):  
N.H.W. Fong ◽  
J.-O. Plouchart ◽  
N. Zamdmer ◽  
Duixian Liu ◽  
L.F. Wagner ◽  
...  
Keyword(s):  
Wide Band ◽  
Common Mode ◽  
Noise Rejection ◽  
Soi Technology

scholarly journals Common-mode noise filtering with space-divided differential 2x2 VLC for V2V applications

2021 ◽  
Vol 53 (4) ◽  
Author(s):  
Balázs Matolcsy ◽  
Eszter Udvary ◽  
Ágoston Schranz
Keyword(s):  
Real Life ◽  
Optical Filters ◽  
Visible Light Communication ◽  
Urban Traffic ◽  
Optical Noise ◽  
Transmission Method ◽  
Common Mode ◽  
Noise Rejection ◽  
Differential Transmission ◽  
Simulation Results

AbstractVehicle-to-Vehicle (V2V) Communication is one of the most promising application opportunities of Visible Light Communication (VLC). This paper suggests a novel transmission technique for VLC-V2V applications, called 2x2 Differential Transmission (2x2 DT). This transmission method exhibits excellent common-mode optical noise rejection performance. This beneficiary property is presented first with simulation results and later with real-life urban traffic measurement as well. After the promising simulation results, a demonstrational automotive-grade VLC-V2V link is presented and investigated for evaluation purposes. The link does not contain electrical filters, optical filters nor optical lenses, hence link costs are kept low and versatility is preserved. With our proposed 2x2 differential solution, both the transmission quality and common-mode optical noise rejection performance is outstanding. Due to the increased sensitivity of the differential VLC transmission regarding crosstalk between channels, a method is suggested for crosstalk reduction for high-quality differential transmission.

scholarly journals Design of 16-Bit SAR ADC Using DTMOS Technique

2021 ◽  
Vol 12 (5) ◽  
pp. 144-152
Author(s):  
Yarlagadda Archana, Kakarla Hari Kishore
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Power Supply ◽  
Sar Adc ◽  
Differential Amplifier ◽  
Common Mode ◽  
Biomedical Implant ◽  
Low Leakage ◽  
Noise Rejection ◽  
Proper Operation

This paper presents a 16-bit 100MS/s SAR ADC with 1V power supply for biomedical implant systems developed with low power technique i.e., DTMOS logic. It consists of a R-2R DAC, low-power comparator, a digital SAR logic with low-leakage. The designed comparator is a differential architecture that has used to have an excellent, common-mode noise rejection. Comparator was created for proper operation to remain in saturation and could be used with differential amplifier. The comparator is the chief block of power consumption, so we focused mainly much of ability we make to design this module. The ADC is designed using Cadence virtuoso with CMOS 45nm technology. For SFDR, SNR, ENOB and power consumption, the converter utilizes 63.97dB, 51.06 dB, 15.15 and 528.8uw.

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