Plant phenotyping studies represent a challenge in agriculture application. The studies normally employ CMOS optical and image sensor. One of the most difficult challenges in designing the CMOS sensor is the need to achieve good sensitivity while achieving low noise and low power simultaneously for the sensor. At low power, the CMOS amplifier in the sensor is normally having a lower gain, and it becomes even worse when the frequency of the interest is in the vicinity of flicker noise region. Using conventional topology such as folded cascode will result in the CMOS amplifier having high gain, but with the drawback of high power. Hence, there is a need for a new approach that improves the sensitivity of the CMOS sensor while achieving low power. The objective of this chapter is to update CMOS sensors and to introduce a modified light integrating circuit which is suitable for CMOS image sensor.
A 10Bit Small Area Low Power Pipelined SAR ADC Used in CMOS Image Sensor