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PUF-Based Secure Test Wrapper for SoC Testing
2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
◽
10.1109/isvlsi.2018.00127
◽
2018
◽
Author(s):
Sudeendra Kumar K
◽
Saurabh Seth
◽
Sauvagya Sahoo
◽
Abhishek Mahapatra
◽
Ayas Kanta Swain
◽
...
Keyword(s):
Soc Testing
◽
Test Wrapper
Download Full-text
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Core Test Wrapper Design to Reduce Test Application Time for Modular SoC Testing
2008 IEEE International Symposium on Defect and Fault Tolerance of VLSI Systems
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10.1109/dft.2008.13
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2008
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Keyword(s):
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Soc Testing
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PUF-based secure test wrapper design for cryptographic SoC testing
2011 Design, Automation & Test in Europe
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10.1109/date.2012.6176618
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2012
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Author(s):
A. Das
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A. Sadeghi
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Test wrapper concepts and implementations
10.1049/ic:20000414
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2000
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Author(s):
D. Downey
Keyword(s):
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SoC Testing Using LFSR Reseeding, and Scan-Slice- Based TAM Optimization and Test Scheduling
2007 Design, Automation & Test in Europe Conference & Exhibition
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10.1109/date.2007.364591
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2007
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Author(s):
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◽
Krishnendu Chakrabarty
◽
Seongmoon Wang
Keyword(s):
Test Scheduling
◽
Soc Testing
◽
Lfsr Reseeding
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Indirect Test Architecture for SoC Testing
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
◽
10.1109/tcad.2004.829796
◽
2004
◽
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◽
pp. 1128-1142
◽
Cited By ~ 23
Author(s):
M. Nahvi
◽
A. Ivanov
Keyword(s):
Indirect Test
◽
Soc Testing
◽
Test Architecture
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Book Reviews: A guide for the wrapper perplexed [a review of The Core Test Wrapper Handbook by da Silva et al.; 2006)
IEEE Design & Test of Computers
◽
10.1109/mdt.2009.139
◽
2009
◽
Vol 26
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◽
pp. 98-99
Author(s):
Scott Davidson
Keyword(s):
The Core
◽
Test Wrapper
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3D Test Wrapper Chain Optimization with I/O Cells Binding Considered
2019 International 3D Systems Integration Conference (3DIC)
◽
10.1109/3dic48104.2019.9058794
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Author(s):
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Hsu-Yu Kao
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A randomization test wrapper for synthesizing single-case experiments using multilevel models: A Monte Carlo simulation study
Behavior Research Methods
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10.3758/s13428-019-01266-6
◽
2019
◽
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◽
pp. 654-666
◽
Cited By ~ 1
Author(s):
Bart Michiels
◽
René Tanious
◽
Tamal Kumar De
◽
Patrick Onghena
Keyword(s):
Monte Carlo Simulation
◽
Monte Carlo
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Simulation Study
◽
Multilevel Models
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Single Case
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Randomization Test
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Monte Carlo Simulation Study
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IEEE Std 1500 Compliant Infrastructure forModular SOC Testing
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◽
10.1109/ats.2005.67
◽
2005
◽
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Author(s):
T. Waayers
◽
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◽
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Soc Testing
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Test-wrapper optimization for embedded cores in TSV-based three-dimensional SOCs
2009 IEEE International Conference on Computer Design
◽
10.1109/iccd.2009.5413172
◽
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◽
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Author(s):
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◽
Krishnendu Chakrabarty
◽
Yuan Xie
Keyword(s):
Three Dimensional
◽
Embedded Cores
◽
Test Wrapper
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