Indirect Test Architecture for SoC Testing

Author(s):  
M. Nahvi ◽  
A. Ivanov
2011 ◽  
Vol 70 (1) ◽  
pp. 5-11 ◽  
Author(s):  
Beat Meier ◽  
Anja König ◽  
Samuel Parak ◽  
Katharina Henke

This study investigates the impact of thought suppression over a 1-week interval. In two experiments with 80 university students each, we used the think/no-think paradigm in which participants initially learn a list of word pairs (cue-target associations). Then they were presented with some of the cue words again and should either respond with the target word or avoid thinking about it. In the final test phase, their memory for the initially learned cue-target pairs was tested. In Experiment 1, type of memory test was manipulated (i.e., direct vs. indirect). In Experiment 2, type of no-think instructions was manipulated (i.e., suppress vs. substitute). Overall, our results showed poorer memory for no-think and control items compared to think items across all experiments and conditions. Critically, however, more no-think than control items were remembered after the 1-week interval in the direct, but not in the indirect test (Experiment 1) and with thought suppression, but not thought substitution instructions (Experiment 2). We suggest that during thought suppression a brief reactivation of the learned association may lead to reconsolidation of the memory trace and hence to better retrieval of suppressed than control items in the long term.


1991 ◽  
Author(s):  
Colleen Kelley ◽  
D. Stephen Lindsay

Author(s):  
Rudolf Schlangen ◽  
Jon Colburn ◽  
Joe Sarmiento ◽  
Bala Tarun Nelapatla ◽  
Puneet Gupta

Abstract Driven by the need for higher test-compression, increasingly many chip-makers are adopting new DFT architectures such as “Extreme-Compression” (XTR, supported by Synopsys) with on-chip pattern generation and MISR based compression of chain output data. This paper discusses test-loop requirements in general and gives Advantest 93k specific guidelines on test-pattern release and ATE setup necessary to enable the most established EFA techniques such as LVP and SDL (aka DLS, LADA) within the XTR test architecture.


IEEE Access ◽  
2021 ◽  
pp. 1-1
Author(s):  
Umair Saeed Solangi ◽  
Muhammad Ibtesam ◽  
Muhammad Adil Ansari ◽  
Jinuk Kim ◽  
Sungju Park

Sign in / Sign up

Export Citation Format

Share Document