Low noise amplifier design in 90nm CMOS technology for near millimetre wave band applications

Author(s):  
J. Yavand Hasani ◽  
M. Kamarei ◽  
F. Ndagijimana
2017 ◽  
Vol 7 (1.3) ◽  
pp. 69
Author(s):  
M. Ramana Reddy ◽  
N.S Murthy Sharma ◽  
P. Chandra Sekhar

The proposed work shows an innovative designing in TSMC 130nm CMOS technology. A 2.4 GHz common gate topology low noise amplifier (LNA) using an active inductor to attain the low power consumption and to get the small chip size in layout design. By using this Common gate topology achieves the noise figure of 4dB, Forward gain (S21) parameter of 14.7dB, and the small chip size of 0.26 mm, while 0.8mW power consuming from a 1.1V in 130nm CMOS gives the better noise figure and improved the overall performance.


2013 ◽  
Vol 2013 ◽  
pp. 1-6 ◽  
Author(s):  
K. Yousef ◽  
H. Jia ◽  
R. Pokharel ◽  
A. Allam ◽  
M. Ragab ◽  
...  

This paper presents the design of ultra-wideband low noise amplifier (UWB LNA). The proposed UWB LNA whose bandwidth extends from 2.5 GHz to 16 GHz is designed using a symmetric 3D RF integrated inductor. This UWB LNA has a gain of 11 ± 1.0 dB and a NF less than 3.3 dB. Good input and output impedance matching and good isolation are achieved over the operating frequency band. The proposed UWB LNA is driven from a 1.8 V supply. The UWB LNA is designed and simulated in standard TSMC 0.18 µm CMOS technology process.


2021 ◽  
Author(s):  
Dongwei Pang ◽  
Yongfeng Gui ◽  
Shiwei Wu ◽  
Xiaohu Wang ◽  
Wang Gang

2010 ◽  
Vol 7 (11) ◽  
pp. 759-764 ◽  
Author(s):  
Mousa M. Othman ◽  
Shuhei Amakawa ◽  
Noboru Ishihara ◽  
Kazuya Masu

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