Design of a Four Terminal Floating Nullor based on modified folded-cascode and class AB output stage

Author(s):  
Jose A. Garcia-Rivera
2015 ◽  
Vol 24 (06) ◽  
pp. 1550078 ◽  
Author(s):  
Seid Jafar Hosseinipouya ◽  
Farhad Dastadast

High performance of fully differential operational transconductance amplifier is designed and implemented using a 0.18-μm CMOS process. The implemented op-amp uses common mode feedback (CMFB) circuit operating in weak inversion region which does not affect other electrical characteristics due to eliminating common mode (CM) levels automatically leading to improve CM rejection ratio (CMRR) of the amplifier significantly. Moreover, the output stage has class-AB operation so that its current can be made larger due to increasing the output current dynamically using adaptive biasing circuit. Additionally, the AC currents of the active loads have been significantly reduced using negative impedances to increase the gain of the amplifier. The results show the GBW 2.3 MHz, slew rate 2.6 V/μs and 1% settling time 150 ns with a capacitive load of 15 pF. This amplifier dissipates only 6.2 μW from a 1.2 V power supply.


Author(s):  
A. Jeevan Kumar ◽  
K. Lokesh Krishna ◽  
K. Abhinav Viswateja ◽  
K. Gopi ◽  
S. Mohan Rao ◽  
...  

2011 ◽  
Vol 31 (2) ◽  
pp. 447-464 ◽  
Author(s):  
Fabian Khateb ◽  
Nabhan Khatib ◽  
David Kubánek

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