Memory design for high temperature radiation environments

Author(s):  
Tai-Hua Chen ◽  
Lawrence T. Clark ◽  
Keith E. Holbert
2016 ◽  
Vol 2016 (HiTEC) ◽  
pp. 000046-000050
Author(s):  
R. Bannatyne ◽  
D. Gifford ◽  
K. Klein ◽  
C. Merritt

Abstract VORAGO Technologies has developed a pair of ARM Cortex M0 MCUs designed from the ground up to be high temperature capable. One of these devices is specifically developed for high temperature applications, the other adds capabilities that make it suitable for use in high radiation environments as well. These devices are fabricated using a modified version of commercial bulk 130nm CMOS technology utilizing our HARDSIL® technology, which provides immunity to the increased effects of latchup and EOS encountered at higher application temperatures. In addition to the processor these devices include features more typical of low temperature SoCs including on-chip memory, timers, and communications peripherals. In addition to the ceramic package and die format typically utilized at high temperature, a new lower-cost plastic package is available that has been characterized at higher temperatures. These devices have been characterized at temperatures up to 200C and results showing the latchup behavior and device performance are provided. Some of the tradeoffs involved in creating such devices are discussed, as well as some of the similarities and tradeoffs in creating a radiation hardened devices vs. a high temperature device.


2017 ◽  
Vol 46 (7) ◽  
pp. 704001
Author(s):  
蔡红华 Cai Honghua ◽  
聂万胜 Nie Wansheng ◽  
吴 睿 Wu Rui ◽  
苏凌宇 Su Lingyu ◽  
侯志勇 Hou Zhiyong

1991 ◽  
Author(s):  
J. HAMILTON ◽  
N. YANG ◽  
W. CLIFT ◽  
D. BOEHME ◽  
K. MCCARTY

1967 ◽  
Vol 7 (5) ◽  
pp. 541-545 ◽  
Author(s):  
B. P. Kozyrev ◽  
Yu. K. Gornostaev

RADIOISOTOPES ◽  
1991 ◽  
Vol 40 (10) ◽  
pp. 414-417
Author(s):  
Shigeki NAKAMURA ◽  
Shinichi OKAMOTO

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