Is there a Zero Temperature bias point (ZTC) on Back Enhanced (BE) SOI MOSFET?

Author(s):  
L. S. Yojo ◽  
R. C. Rangel ◽  
K. R. A. Sasaki ◽  
J. A. Martino
Author(s):  
M. El Kaamouchi ◽  
G. Dambrine ◽  
M. Si Moussa ◽  
M. Emam ◽  
D. Vanhoenacker-Janvier ◽  
...  

2015 ◽  
Vol 28 (3) ◽  
pp. 393-405 ◽  
Author(s):  
Sushanta Mohapatra ◽  
Kumar Pradhan ◽  
Prasanna Sahu

The present understanding of this work is about to evaluate and resolve the temperature compensation point (TCP) or zero temperature coefficient (ZTC) point for a sub-20 nm FinFET. The sensitivity of geometry parameters on assorted performances of Fin based device and its reliability over ample range of temperatures i.e. 25?C to 225?C is reviewed to extend the benchmark of device scalability. The impact of fin height (HFin), fin width (WFin), and temperature (T) on immense performance metrics including on-off ratio (Ion/Ioff), transconductance (gm), gain (AV), cut-off frequency (fT), static power dissipation (PD), energy (E), energy delay product (EDP), and sweet spot (gmfT/ID) of the FinFET is successfully carried out by commercially available TCAD simulator SentaurusTM from Synopsis Inc.


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