The Impact of the Sub-circuits Parameters on the Efficiency of a Charge Pump

2021 ◽  
Author(s):  
Ionelia-Bianca Brezeanu ◽  
Catalin Botezatu ◽  
Alexandru Vasile ◽  
Gheorghe Brezeanu
Keyword(s):  
Charge Pump ◽  
A Charge ◽  
The Impact

Localization Techniques on a 0.15um CMOS Device: Charge Pump Failure Analysis

2002 ◽  
Author(s):  
Hui Pan ◽  
Thomas Gibson
Keyword(s):  
Failure Analysis ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Electrical Characterization ◽  
Charge Pump ◽  
Front Side ◽  
Pump Failure ◽  
Electrical Failure ◽  
Optical Proximity Correction ◽  
A Charge

Abstract In recent years, there have been many advances in the equipment and techniques used to isolate faults. There are many options available to the failure analyst. The available techniques fall into the categories of electrical, photonic, thermal and electron/ion beam [1]. Each technique has its advantages and its limitations. In this paper, we introduce a case of successful failure analysis using a combination of several fault localization techniques on a 0.15um CMOS device with seven layers of metal. It includes electrical failure mode characterization, front side photoemission, backside photoemission, Focused Ion Beam (FIB), Scanning Electron Microscope (SEM) and liquid crystal. Electrical characterization along with backside photoemission proved most useful in this case as a poly short problem was found to be causing a charge pump failure. A specific type of layout, often referred to as a hammerhead layout, and the use of Optical Proximity Correction (OPC) contributed to the poly level shorts.

scholarly journals The Design of a Charge Pump Circuit and System with Input Impedance Modulation for a Flexible-Type Thermoelectric Generator with High-Output Impedance

Electronics ◽  
2021 ◽  
Vol 10 (10) ◽  
pp. 1212
Author(s):  
Kazuma Koketsu ◽  
Toru Tanzawa
Keyword(s):  
Input Impedance ◽  
Thermoelectric Generator ◽  
Charge Pump ◽  
Operating Voltage ◽  
Output Impedance ◽  
Two Phase ◽  
Pump System ◽  
High Output Impedance ◽  
A Charge ◽  
High Output

This paper describes a charge pump system for a flexible thermoelectric generator (TEG). Even though the TEG has high-output impedance, the system controls the input voltage to keep it higher than the minimum operating voltage by modulating the input impedance of the charge pump using two-phase operation with low- and high-input impedance modes. The average input impedance can be matched with the output impedance of the TEG. How the system can be designed is also described in detail. A design demonstration was performed for the TEG with 400 Ω. The fabricated system was also measured with a flexible-type TEG based on carbon nanotubes. Even with an output impedance of 1.4 kΩ, the system converted thermal energy into electric power of 30 μW at 2.5 V to the following sensor ICs.

A Charge-Pump-Based Current Feedback Method for AMOLED Displays

2013 ◽  
Vol 9 (10) ◽  
pp. 783-786 ◽  
Author(s):  
Chih-Lung Lin ◽  
Fu-Chieh Chang ◽  
Po-Chun Lai ◽  
Po-Syun Chen ◽  
Wen-Yen Chang
Keyword(s):  
Charge Pump ◽  
Current Feedback ◽  
Feedback Method ◽  
A Charge

scholarly journals Factors influencing the imposition of a charge on the entrance to the interpretive trails in the large protected areas

2013 ◽  
Vol 61 (4) ◽  
pp. 1041-1049
Author(s):  
Josef Navrátil ◽  
Kamil Pícha
Keyword(s):  
Discrete Choice ◽  
Choice Experiment ◽  
Fractional Factorial Design ◽  
Multinomial Logit Model ◽  
Fractional Factorial ◽  
Large Protected Areas ◽  
A Charge ◽  
Main Effects ◽  
The Impact ◽  
The Way

The aim of this paper is to assess the relation between the character of the interpretive trail and the imposition of a charge on the entrance. This was done using the discrete choice experiment that involves eight attributes, seven of which are with three levels: the overall character of the trail, the way that the route signs are used in the terrain, the ways of providing information, the length of the trail, the way of the routing, the focus of the trail, and the price of the entrance. There is also one with two levels that involves the existence of the places for rest. The fractional factorial design was used (the orthogonal main effects plan) and the Multinomial Logit Model was used in analyzing the data. The 2,830 choices were done by random sampled visitors from eight tourist locations in the Tourist Regions of the Šumava Mts. and South Bohemia during the summer season 2012. The impact of the character of the trail was especially detected in the model. Except for that, the equipment of the trail and its length have had the fundamental impact on the choice of the trail as well. Those longer and worse equipped trails have a significantly lower degree of utility for the respondents. What is quite surprising is that the respondents refused the ecotourism elements of the interpretive trails, such as the possibility of going through the trail on horseback or the accompaniment of an expert who would provide some comments, as it is common to do this at historical attractions within those sightseeing paths.

scholarly journals Design and Implementation of Charge Pump Phase-Locked Loop Frequency Source Based on GaAs pHEMT Process

Sensors ◽  
2022 ◽  
Vol 22 (2) ◽  
pp. 504
Author(s):  
Ranran Zhao ◽  
Yuming Zhang ◽  
Hongliang Lv ◽  
Yue Wu
Keyword(s):  
Maximum Output Power ◽  
Charge Pump ◽  
Phase Locked Loop ◽  
Low Noise ◽  
Signal Frequency ◽  
Maximum Output ◽  
Voltage Controlled Oscillator ◽  
Chip Area ◽  
Frequency Source ◽  
A Charge

This paper realized a charge pump phase locked loop (CPPLL) frequency source circuit based on 0.15 μm Win GaAs pHEMT process. In this paper, an improved fully differential edge-triggered frequency discriminator (PFD) and an improved differential structure charge pump (CP) are proposed respectively. In addition, a low noise voltage-controlled oscillator (VCO) and a static 64:1 frequency divider is realized. Finally, the phase locked loop (PLL) is realized by cascading each module. Measurement results show that the output signal frequency of the proposed CPPLL is 3.584 GHz–4.021 GHz, the phase noise at the frequency offset of 1 MHz is −117.82 dBc/Hz, and the maximum output power is 4.34 dBm. The chip area is 2701 μm × 3381 μm, and the power consumption is 181 mw.

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